GTM-54BWZJH
Skip to main content

UNIX Server SPARC Enterprise M5000 features


Overview Features Specifications Documentation

Outstanding system availability and flexibility, with enterprise-class performance, reliability and virtualization. Up to 32 cores and 4 hardware partitions.

Processor

SPARC64™ VII+: Uplifting performance with the highest reliability

  • Rich CPU resources such as max. 64 threads and 11MB level2 cache and the most efficient threading with the maximized resource use enable excellent performance
  • Performance acceleration technologies including Simultaneous MultiThreading(SMT), super scalar, out of order, branch prediction and speculative execution
  • Multi-level data protection; ECC (Error Checking and Correction) on cache memory, parity checking and instruction retry on Registers & ALU (Arithmetic and Logical Unit)
  • Cutting-edge large system integration (LSI) technologies based on 65nm semiconductor technology means high performance and low power consumption
  • With the same bus protocol in SPARC64™ VI and VII+ and incorporating mixed clock processor in a server , server upgrade cost can be minimized


[ Key Technologies ]
Multi-core multi-thread processor SPARC64™ Series and high reliability technology



High Performance

With the newest and standard technologies across server, application performance improves according to processor enhancement.

  • Doubled level2 cache compared to the previous SPARC64 processor , slashing data access time
  • Max.64GB/sec data transmission performance
  • Performance growth that matches hardware resource addition
  • PCI-Express and Serial Attached SCSI, high speed serial interface support
  • Memory interleave mechanism speeds memory access


[ Key Technologies ]
SMP architecture, Scalable crossbar, PCI-Express, SAS, Memory interleaving



No downtime

Hardware availability fully assured by thorough data protection and component redundancy.

  • Optional memory mirror mechanism assures memory access even in cases of multi-bits errors
  • Hardware-level memory patrol detects memory errors with no exceptions
  • ECC protection assures address and data bus traffic between LSI
  • All major components including HDD, Power Supply Units and Fans can be configured redundantly and hot-swapped
  • Total system redundancy, including server, storage and network using PRIMECLUSTER


[ Key Technologies ]
Memory data protection, Main LSI interface data protection, Redundant configuration, Hot-replacement/downgradability, Dual power feed, XSCF, PRIMECLUSTER



Virtualization

With doubled performance, fine-grained partitioning and lowest performance overhead in virtualization, sever consolidation capacity is also doubled.

  • Fine-grain highly reliable hardware partitioning (min. one CPU chip)
  • Physically isolated independent partitions enable four secure, high-availability/reliability system environments to co-exist on the same server
  • Max four physical partitions can be configured
  • DR (Dynamic Reconfiguration) flexibly expands, isolates or reconfigures partitions without system stoppage
  • Oracle Solaris Containers enable thousands of virtual OS partitions on top of each separate system environment, providing outstanding flexibility in workload and scale-out performance
  • Swift system expansion by COD
  • Remote OS boot (SAN Boot) via fibre-channel


[ Key Technologies ]
Hardware partitioning, DR, Oracle Solaris Containers, COD, Server System Manager, SAN Boot



Investment Protection

SPARC/Oracle Solaris provides the certainty that protects your system assets and provides mission critical service.

  • Oracle Solaris, No.1 market share, UNIX OS (based on UNIX System V Release 4)
  • Application binary compatibility, ensures all your applications will run without change or recompilation
  • SPARC64™ VI/VII+ and Oracle Solaris conform to the same SPARC V9 open processor architecture as all other SPARC processors and operating system versions. This provides the most stable roadmap into the future


[ Key Technologies ]
Oracle Solaris, SPARC, Processor roadmap