SPARC64™ VI/VII/VII+ enhances the high performance and high reliability features of SPARC64™ V and further boosts performance using multi-core and multi-thread per core technology imbedded on a single CPU chip.
SPARC T4 processor can improve application parallelism by executing 64 threads at a time – 40nm technology inside allows accommodate 8 threads per core and 8 core per CPU chip, Plus, computation-intensive applications can enjoy high performance because two computations can be executed in parallel at a time.
SPARC Enterprise mid-range and high-end servers incorporate high speed and wide bandwidth crossbars inherited from supercomputer high speed interconnect technology.
Access time to memory and I/O can be reduced because controllers for memory, PCI Express, and 10Gbit Ethernet are inside CPU chip,
As a result of data traffic growth and serial interface transmission speed boosts serial transmission has taken over previous parallel transmission methods.
Mid-range and high-end models of SPARC Enterprise use memory interleave technology. This improves memory access performance by enabling parallel access to multiple memory chips.
SPARC Enterprise M9000, the largest model in the series, is also the most scalable. SPARC Enterprise meets the changing business environment allowing processing data growth through flexible system expansion.