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  6. Fujitsu to Provide Industry’s First Comprehensive Environment for Statistical Timing Analysis for Submicron Designs

Fujitsu to Provide Industry’s First Comprehensive Environment for Statistical Timing Analysis for Submicron Designs

Timing Optimization Turn-around Times to be Reduced by up to 30 Percent

Fujitsu Semiconductor America Inc.

Sunnyvale, CA, July 21, 2006

Fujitsu Microelectronics America, Inc. (FMA) announced that Fujitsu is the first semiconductor supplier to provide a comprehensive environment for statistical timing analysis for ASIC and COT customers. The new environment enables designers to reduce the design-optimization time in layout designs, by allowing them to calculate the circuit delays using statistical analysis of the impact of process variations.

The environment includes statistical static-timing-analysis tools developed together by Fujitsu Limited, Fujitsu VLSI Limited and Fujitsu Laboratories Limited, and cell libraries with process variations. The Anova SuiteTM, developed by Anova Solutions Inc., has been implemented in the environment in order to analyze process variations and characterize library cells.

“Fujitsu has a long and successful history in leading-edge ASIC development and process technology, and today’s announcement continues and expands our leadership in high-performance ASIC design and production,” said Keith Horn, vice president of marketing for Fujitsu Microelectronics America. “Our 90nm CS101 ASIC technology is an excellent choice for networking, communications and mobile-device applications where low power and a small footprint must combine with maximum performance. We are working quickly on a significant number of new designs in all these sectors. With the new 300mm fab, Fujitsu can assure our customers that we have the capacity to address their volume requirements..”

“The ability to analyze the impact of process variations in deep-submicron technologies at the cell design stage is a significant breakthrough for ASIC and COT designers,” said Yoshio Kuniyasu, senior director of SoC Design Engineering Center for Fujitsu Microelectronics America. “Fujitsu has teamed with Anova to provide a comprehensive environment developed to resolve this challenge. We are confident that our customers will realize significant reductions in timing optimization turn-around time as they implement the system.”

Statistical timing-analysis techniques, which check if a circuit can function at a targeted frequency, are becoming a key DFM (Design For Manufacturing) requirement for resolving the challenges of the fabrication process during the design phase. Since process variations in transistors significantly affect cell delays and circuit delay in 90-nanometers and deeper submicron technologies, more accurate timing-analysis methodologies are needed to handle the variations.

Conventional static-timing-analysis methods often overestimate circuit delay, since they cannot handle delay variations caused by a process. In contrast, the statistical static-timing-analysis environment provided by Fujitsu can handle the delay variations of transistors statistically. This enables layout designers to estimate the circuit delay more accurately and optimize the circuit effectively so that it can run at the targeted frequency. Timing-overestimation problems are avoided, since the delay computation is completed in the presence of process variations. As a result, timing optimization turn-around time can be reduced by up to 30 percent.

Another feature of the environment is that it is integrated in Fujitsu’s reference design flow. Designers can invoke the easy-to-use environment seamlessly in the original flow.


Fujitsu’s environment for statistical timing analysis will be available to ASIC and COT customers in October 2006. Fujitsu will provide the environments for both 90nm and 65nm technology, and will continue to build more advanced design environments by establishing close partnerships with EDA vendors. The new design kit will also be available in October 2006.

About Fujitsu Limited

Fujitsu is a leading provider of customer-focused IT and communications solutions for the global marketplace. Pace-setting device technologies, highly reliable computing and communications products, and a worldwide corps of systems and services experts uniquely position Fujitsu to deliver comprehensive solutions that open up infinite possibilities for its customers' success. Headquartered in Tokyo, Fujitsu Limited (TSE:6702) reported consolidated revenues of about 4.8 trillion yen (US$40.6 billion) for the fiscal year ended March 31, 2006. For more information, please see

About Fujitsu Microelectronics America, Inc.

Fujitsu Microelectronics America, Inc. (FMA) leads the industry in innovation. FMA provides high-quality, reliable semiconductor products and services for the networking, communications, automotive, security and other markets throughout North and South America. As a founding and board member of the WiMAX Forum™, Fujitsu supports the standards development and compliance programs that are essential to successful Broadband Wireless deployment. Fujitsu provides performance-driven WiMAX solutions by leveraging the company's experience and expertise in the networking and communications markets. Fujitsu offers flexible WiMAX SoC and reference designs for WiMAX-certifiable systems to equipment vendors. For more product information, please visit the company's web site at or please address e-mail to

Press Contact - FMA

Emi Igarashi

Phone: Phone: 408-737-5647
E-mail: E-mail:
Company:Fujitsu Microelectronics America, Inc.

Date: July 21, 2006
City: Sunnyvale, CA
Company: Fujitsu Microelectronics America, Inc.