The K computer, uses a "SPARC64™ VIIIfx" CPU designed and developed by Fujitsu. The features of this CPU are described below.
45 nanometer process technology is employed in the "SPARC64™ VIIIfx CPU to provide a number of advantages. If you drew complex electric circuit using 1-mm wide wires, it would turn out to be the size of an athletic field. But if you make the wire as thin as possible the same circuit can be reduced to the size of a postage stamp. As the level of integration increases the wire length in the circuit also becomes shorter and the number of cores, the base units that perform calculations, increase. This increases the overall performance. At the same time, since this miniaturization also decreases the number of components, the failure rate also decreases. Furthermore, the smaller the physical circuit size, the greater the reduction in power consumption.
Let's look at the approaches to achieving "high performance," "high reliability," and "low power consumption" in the SPARC64™ VIIIfx.
The size of each transistor (gate length) within the "SPARC64™ VIIIfx" is 45 nanometer (45 nm). So, how big is a nanometer? The term "nano" means "dwarf" in Latin and as a unit of length represents "one billionth". One nanometer is one billionth of one meter, i.e. one millionth of one millimeter. The average diameter of a human hair is about 80 millionths of a meter, usually written as 80μm. This makes 45nm about 1700th the thickness of the average human hair.
How on earth is a CPU with such high computation power created?
Let's check the procedures for creating a CPU using the silicon ingot process.
See How to Create a CPU
The heart of the K computer consists of 80,000 or more "SPARC64™ VIIIfx" CPUs. Each CPU is equipped with eight cores, which are "the minimum units that perform calculations", and performs 128-gigaflops. Moreover the 80,000 or more CPUs (640,000 or more cores) combined achieve the tremendously high speed of 10-petaflops computational performance per second (one Kei in Japanese).
With the K computer equipped with 80,000 or more CPUs, one of the most important challenges is ensuring optimal performance from such a large-scale system. This is done by making all of the CPUs perform in a stable state.
Circuits in each SPARC64™ VIIIfx CPU are equipped with an "error recovery function". This is a mechanism for automatic recovery. If there is an error during computation, that instruction is automatically executed again so that there is no impact on system operation.
In addition, the CPUs in the K computer are efficiently cooled with water. Ensuring the CPUs always operate at low temperatures provides a low failure rate, which also improves component life.
These schemes assist with the great improvement in reliability of the whole system.
Another challenge with the K computer is how much power consumption can be reduced. In a normal large-scale system with many interconnected high performance CPUs, increases in the number of CPUs are proportional to increases in the amount of power consumed. To reduce the power consumption of the whole system, it is necessary to reduce the power consumption of each CPU.
It is difficult to achieve both high performance with many interconnected CPUs and reduce power consumption at the same time. However, we achieved both in the development of the K computer.
Generally speaking, the power consumption in an electric circuit is reduced more when its temperature is lower. The K computer reduces its power consumption by decreasing CPU temperatures and heating values through its efficient water cooling system.
In addition, a design scheme is employed whereby any unused circuits during CPU computations do not consume power unnecessarily.
Based on these innovations, the "SPARC64™ VIIIfx" CPU achieves world top speeds of 2.2 billion computations per second per watt (2.2-gigaflops per watt) in a single chip.
It can be said that K computer is an environmentally friendly system with very high energy efficiency.
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