CMOS technology
A semiconductor technology comprised of N-type and P-type metal-oxide semiconductor (MOS) transistors with complementary connections, created on a silicon substrate. Attributable to their low power requirements, CMOS integrated circuits are currently the mainstream.
 I/O interface (Input/Output interface)
Refers to functions for I/O signal logic and sequencing, and transmitter IC operation mode, which can be controlled using I2C bus interface.
 Signal processing
Refers to the following functions: a data-recovery function that enables five 10Gbps electrical signals to be received without error, a function that accommodates timing errors between these five signals, and a function that synchronizes the timing of these signals.
 High-speed signal generation
A function that receives four 10Gbps electrical signals, and generates either two 20Gbps electrical signals or one 40Gbps electrical signal.
 Compound semiconductor
A semiconductor formed using two or more elements, such as gallium-arsenide (GaAs) or indium-phosphide (InP), and which features higher electron mobility than silicon, therefore permitting faster operation.
 Parasitic capacitance
Undesirable static capacitance that emerges between a transistor element's Input/Output (I/O) electrodes, or between the transistor and electrodes of peripheral elements surrounding the transistor. The amount of parasitic capacitance varies depending on the electrode size of the elements or distance between elements, thus making it impossible to indicate parasitic capacitance in schematic circuit diagrams.
A coil element in which electrical conductivity becomes more difficult at higher frequencies (passes low-frequency signals, but resists passage of high-frequency signals). Inductors are usually formed as coil circuit patterns on semiconductors.
Serdes Framer Interface Level 5 Phase 2. Refers to a standard promulgated in October 2006 at the Optical Internetworking Forum (OIF) 2006.
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Date: 13 February, 2009
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