|Overview - Using DMA in Lime’s 16-bit Host Interface Modes||1|
|DMA Function in Lime’s 16-bit Mode||1|
|DMA Access to Lime in 16bit SRAM I/F and 16bit A/D Multiplex Modes||1|
DMA access is very important for large-volume, high-speed data transfer from the host CPU to the GDC (graphic display controller). One of the most common uses is displaying the Startup screen (a bitmap) in an automotive cluster or navigation application after the system powers up.
Historically, Fujitsu GDCs have supported a 32-bit, non-address-multiplexed interface for the host controller. This mode supports the DMA signals (DREQ, DRACK and DTACK) that allow the host CPU’s DMA controller to access Lime.
With the introduction of Lime, Fujitsu has added versatility to the GDC host interface by enabling 16-bit dedicated or address-multiplexed modes, in addition to a 32-bit address-multiplexed interfaced mode. The GDC uses an unconventional technique for data transfer to keep supporting DMA access from the CPU in these modes. The following explains how the DMA transfer works in such a case.
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