1-Mbit dynamic RAM with a new memory cell structure successfully developed in 1985. Its increase in area was minimized by reducing the area of its memory cells to roughly 1/3 what they were before, and it employed an original chip layout that differed from conventional ones, making it possible to be mounted in a plastic package of nearly the same size as that for 256K memory. The newly-developed memory cells were also strong against software errors, so they could be applied not only in 1-Mbit DRAM products but even in high-density DRAM.
Access time: 90 nanoseconds (TRAC), 45 nanoseconds (TCAC)
Power consumption: 350 mw during operation, 15 mw during standby
Power supply voltage: 5V