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FEOL (Front End of Line: substrate process, the first half of wafer processing)
2. Well and channel formation

How a semiconductor wafer is made

N-MOS transistors and p-MOS transistors are formed in a chip.
Impurities appropriate for n-MOS transistors and p-MOS transistors are respectively implanted into the Si surface at appropriate concentrations in the regions where the transistors are to be formed (n-MOS: p-well, n-channel; p-MOS: n-well, p-channel). In the case where transistors with two or more different voltages and characteristics are made, impurity implantation of different dopants/dosages is additionally performed.
Repeat "2-3. n-Channel" and "2-4. p-Channel.

2-1. p-Well

p-Well

A resist pattern is formed to cover the p-MOS area, and p-type impurities (e.g., boron (B)) are implanted in the n-MOS area.
After implantation, the resist pattern is removed.


2-2. n-Well

n-Well

A resist pattern is formed to cover the n-MOS area, and n-type impurities (e.g., phosphorus (P)) are implanted in the p-MOS area.
After implantation, the resist pattern is removed.


2-3. n-Channel

n-Channel

A resist pattern is formed to cover the p-MOS area, and p-type impurities (e.g., boron (B)) are implanted in the n-MOS area.
After implantation, the resist pattern is removed.


2-4. p-Channel

p-Channel

A resist pattern is formed to cover the n-MOS area, and n-type impurities (e.g., arsenic (As)) are implanted in the p-MOS area.
After implantation, the resist pattern is removed.

Process Flow

FEOL (Front End of Line: substrate process, the first half of wafer processing)
| 1. Isolation | 2. Well and channel formation | 3. Gate oxidation and gate formation
| 4. LDD formation | 5. Side wall spacers | 6. Source/drain | 7. Silicide | 8. Dielectric film |
9. Contact holes |

BEOL (Back End of Line: interconnect process, the second half of wafer processing)
| 10. Metal-1 | 11. Metal-2 |

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