Abstracts of Magazine FUJITSU 1998-3 (VOL.49, NO.2)

Special Issue : System LSI

• System LSI : Present and Future Trends

The rapid progress in semiconductor technology has enabled system level functions to be realized on a single silicon chip and has put System LSI in the spotlight.By 2000,integration levels surpassing 10 million gates will be possible and production of products based on 0.18 μm process technology will soon be started. Also,embedded DRAM will be realized and System LSI performance will jump dramatically.
However, because the design capabilities for complex System LSI are still weak, LSI design flow is becoming increasingly subdivided and specialized. Also,to reduce design time,standardization and open systems are being promoted to reuse the IP (Intellectual Property) of functional circuits blocks with assured performance and operation. This paper describes Fujitsu's efforts regarding new design environments and the construction of the IP Highway concept.

• Geometry Processor for PC 3D Graphics : Pinolite

This paper introduced a geometry processor for PC 3D Graphics. 3D graphics operation consists of two parts；Geometry and Rendering. The Geometry part executes pipelined instructions that transform, modify, and move the positions and shapes of 3D objects. The rendering part colors 2D projections of these 3D objects.
Pinolite is an optimized processor for performing the geometry operation. It can process up to 500 k gouraud polygons/s and 750 k flat polygons/s at 100 MHz operation, which equals the peak performance of the top-line arcade game machines. In certain parts of the 3D WinBench 98 test, Pinolite demonstrated a more than 80% performance advantage over the Intel Pentium MMX (200 MHz).
This article describes the architecture of Pinolite,the instruction set used for high-speed geometry operations,and specific bus interface implementations for the PC platform.

• CPU Core for System LSI

Using today's sub-micron process technology,it is relatively easy to fabricate multiple functional components onto a single chip. However, for these systems-on-silicon, customers need more system flexibility to cope with their specification changes and the technology to integrate a CPU core into a system LSI.
This paper introduces two CPU cores for system LSI that provide high calculation and control capabilities. The first of these,the SPARClite CPU core,is suitable for use as a network controller and as a controller for laser printers,digital cameras,and other equipment. Applications for the second core,the FR CPU core,include control of video cameras and ink-jet printers.

• System LSI for MPEG2 Decoder

MPEG2 is a signal compression technique for digital video media. It is used, for example, in PerfecTV, which is a digital-TV satellite broadcasting service that has been available in Japan since 1996,and in DVD equipment,mass production of which was started in 1997.
Decoding of compressed MPEG2 data involves a large number of various types of logical and arithmetical processes,for example,parsing of the input stream,extraction of the video/audio stream,and decoding of the complex coded data.
Fujitsu has already produced an MPEG2 decoder to decode video signals for teleconferencing systems. Now,we have developed an MPEG2 decoder LSI (MB86371) for DVD systems which support stream parsing,trick play, MPEG1 or Dolby AC-3 audio decoding, and other special functions. Manufacturers are already producing DVD players which incorporate this new LSI.
For digital-TV satellite broadcast receivers, we have produced a QPSK demodulator LSI (MB86660) for tuner signals and have almost finished development of an MPEG2 decoder LSI which supports a transport stream demultiplexer and MPEG2 audio decoder for digital-TV satellite broadcast receivers.

• DSP for Multimedia Audio

This paper introduces the MULti Channel Audio Processor (MUCAP),which is a Dolby Digital (AC-3) and MPEG-Audio decoder.
MUCAP efficiently decodes Dolby Digital (AC-3) and MPEG-Audio using a high-performance DSP-core and on-chip peripherals for specific applications.
The device has been approved as a Dolby Digital (AC-3) Decoder LSI by the Dolby Laboratories Licensing Corporation. MUCAP can also decode Dolby Digital (AC-3) with Dolby Pro Logic or any other surround-sound processing.

• LSI for Cellular Telephones

Reductions in size and weight and the consequent increase in portability are key reasons for the current popularity of portable cellular telephones. These improvements have mainly been achieved through advanced LSI technology.
The main role for LSI is to decrease chip numbers by integration and to reduce power consumption. Fujitsu has reduced its baseband chipset from five chips to just two using advanced mixed technology. Also, the power consumption of the chipset has been drastically reduced using fine process technology. The new chipset will have a big impact on the size and weight of cellular phones. This paper describes the unique technologies used in the new chipset.

• Developments in Memory Market

In the DRAM and flash memory market, the competition to develop devices with lower voltages, faster operating speeds,and smaller total mounting areas has been intensifying. This trend is also expected to be seen in the field of system LSI as designers set their sights on incorporating higher-density memory chips.
In the DRAM market, where drastic advances towards faster operating speeds are expected, Fujitsu is leading the industry with its Double Data Rate (DDR) technology. Regarding flash memory development, Fujitsu, in partnership with Advanced Micro Devices, is operating the largest flash-memory only facility in the world and outputs some of the most advanced devices in the market.
This paper gives an overview of the DRAM and flash memory devices Fujitsu has developed, including the lineup of Fujitsu's packages and flash memory cards.

• Introduction of New Design Methodologies for System LSI

This article describes the following new design methodologies we have introduced for designing large-scale,high-performance System LSI：HW/SW (Hardware/Software) Co-design：This enables simultaneous development of hardware and software. Using this methodology, system verification (including software verification) can be started long before the actual hardware is produced.
A Logic Verification methodology consisting of static timing analysis for high-speed timing verification and formal verification for high-speed logic function verification. This methodology can drastically reduce the logic verification time.
Logic Floorplan：This combines the logic floorplan and re-optimization,which enables logic design software to use an estimated wire capacitance that is closer to that of the actual layout. This helps avoid post-layout timing errors,and eliminates the need for ECO,which is conventionally required.
An RT Level Power Analysis combined with a Low-power Synthesis methodology that quickly provides an optimized low-power design.

• Development and Run-time Environments for System LSI Software

Software for system LSI is becoming increasingly diversified and complex. Because of this, program developers are finding it difficult to meet deadlines with just a compiler and debugger. Therefore, Fujitsu has developed an integrated development environment called SOFTUNE. SOFTUNE raises development efficiency by linking tools such as the editor, compiler, and debugger. Fujitsu also provides various other products, for example, language tools, debugger environments. ICEs, realtime operating systems, and CO-design tools, which customers can select according to their development needs.
To help developers prepare software for today's environment, Fujitsu has developed reference boards and multimedia libraries with realtime operating systems for run-time verification of network and multimedia software.
This article introduces the development of such system LSI software environments.

• Verification Technology for System LSI Design

Further increases in the scale of System LSI require a new design verification technology that improves LSI design quality.
By the year 2000,random logic designs will contain from 3 to 5 million transistors and 1.5 to 3 times the number of bugs found in current designs. About 70% of all design bugs come from insufficient LSI design verification.
New verification technologies such as Formal Verifications based on model checking and test case generation based on Cause-Effect Graphing have been investigated in actual system LSI design verifications. However,in Formal Verification,design size limitation and RTL model generation with reduction and abstraction are serious problems. In Cause-Effect Graphing,the problems are how to specify criteria and extract LSI specifications.

• Low-Power Technology

This paper presents a Dual-Vth CMOS circuit scheme which reduces the power consumption of system LSI by using high threshold-voltage and low threshold-voltage transistors. A low-power technology road-map utilizing our device and circuit design methodology enables lower power consumption than the standard technology road-map. At half-speed performance, our new road-map reduces power consumption to about 10% that of LSI fabricated using conventional technology, and the reduction achieved at same-speed performance is to about 60％.
This article describes a low-power design methodology applied to an accumulator/multiplier and an SRAM,which are essential macros for system LSIs. By using these low-power macros and a parallel architecture, we can produce a DSP core for an audio CODEC that has only 20% the power consumption of the standard technology equivalent.

• Process Module Technologies for Next Generation CMOS Logic LSIs

This paper describes key process module technologies for post quarter-micron generation CMOS logic LSIs.
High-performance logic LSIs are now facing the problems caused by increased power consumption and the interconnect barrier of LSI wiring.
To achieve a lower power operation,we have developed a retrograde well structure,a dual-gate Co-salicide process with reduced threshold voltage,and a shallow trench isolation technology. Also, low-resistance wiring and materials with a lower dielectric constant are suitable for reducing the interconnect barrier. However,to tackle these two problems more effectively,a new design methodology should be developed. Especially,the interconnect barrier problem requires a paradigm shift in our approach to system and circuit design.

• Fujitsu IP Highway

This article describes Fujitsu's IP Highway,which is a system for distributing the Intellectual Property (IP) of LSI over the Internet and intranets.
The system automatically distributes IP information on a server in one office to servers in global offices using open server communication technologies.
LSI designers can retrieve IP information on-demand using the system's high-performance search technologies. For the server communication, we use standard technologies which are easy for many companies to use. We use the SGML format for communication records and the CORBA method for server communication.
The search engines employ the Classification method for IP items that are searched and the Comparison method for IP information.

• MPEG-2 Video Codec : FEDIS-M2

Data compression is essential for efficient transmission of video over a network. One device which performs this compression, and the necessary decompression for reception, is the Video Codec (Coder/decoder). One half of the Video Codec encodes and multiplexes video and audio data and then transmits the result to a network. The other half performs the inverse function for reception of data from the network.
Current CODECs are widely used for video/audio transmission. However,to expand the use environment,CODECs must be given a function that enables them to adjust to any network system and be capable of high-quality video/audio transmission.
This article looks at the problems affecting the use of CODECs and describes an MPEG-2 VIDEO CODEC that Fujitsu has recently developed to overcome these problems.

• Tactical Data Mining System

The use of analytical data processing to gain a competitive business advantage has been spreading from the professional field to the non-professional field. Also, the need to employ this type of processing in both top-down and bottom-up tactical applications can be expected to increase.
Fujitsu has developed a powerful tactical data mining system that combines the following three products：SymfoWARE Navigator：an Online Analytical Processing (OLAP) System, SymfoWARE VisualMiner：an easy-to-use data visualizer which assists in human imagination and insight,and SymfoWARE Mining Server：a power data mining engine which supports three data mining techniques.
This article introduces the new data mining system.