Foundry Services

Evolution of Fujitsu’s MOSFETs

State-of-the-Art of 45-nm

Fujitsu most advanced 45nm CMOS technology requires not only finest gate definition but also new techniques of high-speed interconnects, and stressors, shallow-junctions.

Beginning in 65-nm node, Fujitsu has adopted silicon-nitride films as Dual Stress Liner (DSL) to enhance drive-ability of MOS transistors. This technique was fine-toned, and Fujitsu developed new method of introducing higher stress channels for 45-nm transistors.

Advance CMOS manufacturing process contains annealing to activate impurities. Fujitsu uses Milli-Second Annealing technique to form extremely shallow junctions for high-performances in 45-nm transistors. This annealing technique heats wafer up to 1000 degrees Celsius in few thousandth second, a differentiation where Fujitsu is a leader in advance process technology.

Why Fujitsu?

• State of art concept manufacturing facility

• Risk Management for Stable Volume Supply
  
  • Industry first earthquake tolerant manufacturing structure
  • 300mm wafer capacity expansion
• Advance process technology roadmap extending to 32nm
  
  • Low leakage and High performance transistors
  • Well established Cu / Low-k interconnect technology
  • Proven manufacturing and process reliability
• Flexible business models to meet customer’s requirements from COT to ASIC
  
  • Design services and expert consultations
  • An advanced packaging and assembly technology
• Rich IP Portfolio and partnership serving customer requirement across various market segments
  
  • Extensive processor cores
  • High Speed Interfaces
  • Analog and Mix-signal Capabilities
• Legend of LCOS-Quality Mirror Metal
  
  • Smooth, flat and highly reflective
  • Narrow gap filling technology
  • High-voltage transistor lineups