Semiconductor Manufacturing Services

Press Releases

Semiconductor Manufacturing Services
ASIC
Foundry Services
Advanced Packaging

Semiconductor Manufacturing Services Press Releases

November 12, 2008 Sunnyvale, CA: Fujitsu Providing 65nm RF CMOS Manufacturing Services with Advanced RF CMOS Process Design Kit
Sunnyvale, CA, November 12, 2008 – Platforms are Ideal for High-performance and Low-power Wireless SoCs
March 31, 2008 Sunnyvale, CA: Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group

ASIC Press Releases

May 27, 2010 Sunnyvale, CA: Fujitsu Microelectronics Publishes Technical Paper on 56GSa/s Analog-to-Digital Converter Technology for 100Gbps Designs
Sunnyvale, CA, May 27, 2010 – Details Ultra-fast CMOS ADC Technology Breakthrough for Advanced Telecommunications Applications
November 12, 2008 Sunnyvale, CA: Fujitsu Providing 65nm RF CMOS Manufacturing Services with Advanced RF CMOS Process Design Kit
Sunnyvale, CA, November 12, 2008 – Platforms are Ideal for High-performance and Low-power Wireless SoCs
March 31, 2008 Sunnyvale, CA: Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group
September 11, 2007 Sunnyvale, CA: Fujitsu Developing ASICs for GPS Receivers with Industry Leader NovAtel
Sunnyvale, CA, September 11, 2007 – Second ASIC in Series Continues Collaboration between Fujitsu and NovAtel
February 13, 2007 San Francisco, CA: Fujitsu Develops Industry’s First CMOS Integrated Circuit that Recovers Clock and Data at 40-44Gbps
San Francisco, CA, February 13, 2007 – Low Power, High Integration Provided by CMOS to Enable 40Gbps Optical SerDes
September 15, 2006 Tokyo, Japan: Fujitsu and Advantest to Establish Joint Venture to Create Semiconductor Prototypes Using Electron Beam Direct Lithography
Tokyo, Japan, September 15, 2006 – Fujitsu Limited and Advantest Corporation today announced plans to establish a joint venture to create prototype semiconductors by using electron beam direct lithography.
September 12, 2006 Sunnyvale, CA: Fujitsu Now Accepting ASIC Designs for Production Using its 65-Nanometer Process Technology for its North American Customers
Sunnyvale, CA, September 12, 2006 – High Density, Low Power, Small Gate Lengths Ideal for Consumer, Communications Product Designs
August 29, 2006 Sunnyvale, CA: Fujitsu Introduces Trio of New Macros for ASIC Designs for 90nm and 110nm
Sunnyvale, CA, August 29, 2006 – New PCI Express, 10G SerDes, Serial ATA Macros Support Server, Wireless, Storage and Desktop Computing Applications
July 21, 2006 Sunnyvale, CA: Fujitsu to Provide Industry’s First Comprehensive Environment for Statistical Timing Analysis for Submicron Designs
Sunnyvale, CA, July 21, 2006 – Timing Optimization Turn-around Times to be Reduced by up to 30 Percent
September 22, 2004 Sunnyvale, CA: Fujitsu Continues ASIC Leadership with 90-nanometer CS101 CMOS Standard Cell Series
Sunnyvale, CA, September 22, 2004 – Thirteen New Designs Underway Using Leading-Edge 90nm Process Technology
September 21, 2004 Sunnyvale, CA, and Tokyo, Japan: Fujitsu and Synplicity Join Forces to Deliver Customized Amplify Product for Fujitsu AccelArray
Sunnyvale, CA, and Tokyo, Japan, September 21, 2004 – Customized Optimization Speeds Time-to-Market and Offers Optimal Performance
May 10, 2004 Sunnyvale, CA: Fujitsu Delivers Trio of ASICs to Innovative Start-Up Greenfield Networks
Sunnyvale, CA, May 10, 2004 – Built Using Fujitsu's 0.11-Micron Process Technology, ASIC Includes the First Network Processor Streaming Interface at 1.3 Gigabit/Second
April 30, 2004 Sunnyvale, CA and Calgary, Canada: Wi-LAN and Fujitsu Expect to Produce First-to-Market WiMAX Certified System
Sunnyvale, CA and Calgary, Canada, April 30, 2004 – System-on-Chip Engineering Samples Planned for Fall 2004
November 20, 2003 Sunnyvale, CA: Fujitsu Introduces ARM9 Multi-CPU Evaluation Device
Sunnyvale, CA, November 20, 2003 – Fujitsu Microelectronics America, Inc. (FMA) today introduced a new ARM9 multi-CPU evaluation device, the MB87Q1100, as part of a platform developed to enable customers to design large, complex systems with very high levels of predictability and efficiency. The MB87Q1100 integrates the ARM926EJ-S and ARM946E-S embedded macrocell cores in Fujitsu's next-generation System-on-Chip (SoC) platform.
September 24, 2003 Sunnyvale and San Diego, CA: Pulse~LINK Selects Fujitsu to Co-develop CMOS SoC ASIC
Sunnyvale and San Diego, CA, September 24, 2003 – Pulse~LINK, Inc. and Fujitsu Microelectronics America, Inc. (FMA) today signed an agreement to jointly develop a digital baseband processor using Fujitsu’s 0.11-micron CMOS SoC ASIC solutions. This ASIC will be used in the Pulse~LINK system designed specifically for the world’s first Ultra Wideband Wireless Local Area Network (WLAN).
September 9, 2003 Sunnyvale, CA: Fujitsu Delivers a Series of High-Performance ASICs to Foundry Networks
Sunnyvale, CA, September 9, 2003 – Fujitsu, Foundry Networks Continue Strong, Multi-Year Collaboration
September 9, 2003 Sunnyvale, CA: Fujitsu Introduces Industry’s First 10Gbps SERDES Macro for Networking Designs
Sunnyvale, CA, September 9, 2003 – Low Power, Low Voltage and High-Performance Macro Maintains Fujitsu’s Leadership in 10Gbps Technology
April 23, 2003 Sunnyvale, CA: Fujitsu’ New IP-Phone Chip, Built Around Customized VoiceDSP™
Sunnyvale, CA, April 23, 2003 – SoC, Reference Design Board and Software Deliver Cost-effective, Complete Single-Chip Solution for Carrier Suppliers
April 14, 2003 Sunnyvale, CA: Fujitsu Releases System Packet Interface Level-4 I/O Macro
Sunnyvale, CA, April 14, 2003 – Newest in Series of High-end I/Os for SoC ASICs Joins SFI-4, SFI-5, Transceiver Macros
March 20, 2003 Sunnyvale, CA: Fujitsu to Deliver a Major Presentation on the 802.16a Standard
Sunnyvale, CA, March 20, 2003 – Fujitsu Microelectronics America, Inc. (FMA), an industry leader in system-on-chip (SoC) technology for the wireless network market, will provide a presentation on the 802.16a standard at the annual Broadband Wireless World Conference at the McEnery Convention Center in San Jose.
January 14, 2003 San Jose, CA, and Richardson, TX: Fujitsu Delivers Seven New High Performance ASICs to Texas-Based Chiaro Networks
San Jose, CA, and Richardson, TX, January 14, 2003 – FMA, Chiaro Collaboration Moves ASICs from Design to Fabrication in One Year
January 14, 2003 San Jose, CA, and Richardson, TX: Fujitsu Delivers Seven New High Performance ASICs to Texas-Based Chiaro Networks
San Jose, CA, and Richardson, TX, January 14, 2003 – FMA, Chiaro Collaboration Moves ASICs from Design to Fabrication in One Year
September 18, 2002 San Jose, CA: Fujitsu Named #2 ASIC Supplier Worldwide by iSuppli
San Jose, CA, September 18, 2002 – Market research firm iSuppli Corporation has named Fujitsu the #2 ASIC supplier worldwide, it was announced today. According to the "Going, Going, Gone - Is There a Place for Second-Tier ASIC Suppliers?" report published in July 2002, Fujitsu moved up two places in 2001, and is now second only to IBM in worldwide ASIC revenue.
September 18, 2002 San Jose, CA: New Macros from Fujitsu Deliver Low Power, Low Cost CMOS Performance to 10 Gigabit Ethernet
San Jose, CA, September 18, 2002 – XAUI-compliant Transceiver, 3.125 Gig/second Parallel CDR Transceiver Provide Highly Integrated Industry-Standard Macros in Fujitsu's 0.11 Micron CMOS Technology
June 4, 2002 Orlando, FL and San Jose, CA: Delivery of Groundbreaking High-Speed Peer-To-Peer Mobile Broadband ASIC
Orlando, FL and San Jose, CA, June 4, 2002 – First-of-its-Kind Chip Will Drive Deployment of Cost-effective Mobile Broadband Applications and Subscriber Devices
June 4, 2002 San Jose, CA: Fujitsu Introduces 90-Nanometer Process Technology in North America
San Jose, CA, June 4, 2002 – New 90-Nanometer Capability Ready for New Generation of Server, Network, Storage, Mobile Products
June 4, 2002 San Jose, CA: Fujitsu Introduces Two SERDES Framer Interface Macros for System-on-Chip ASICs
San Jose, CA, June 4, 2002 – OIF-Compliant Cores Provide Pre-Verified Building Blocks for Efficient Application Design
March 25, 2002 San Jose, CA: Fujitsu Introduces High-speed, High-density 0.11 micron CS91 Standard Cell Series
San Jose, CA, March 25, 2002 – Offers Large Selection of Standard Cell Libraries, Memory Macros, IP Cores
March 13, 2002 San Jose, CA: Fujitsu' New VOIP CODEC Supports Four Simultaneous Channels
San Jose, CA, March 13, 2002 – Built Around ARC Core with DSP Extensions, Aimed at Voice Client Applications
February 26, 2002 San Jose, CA: Fujitsu' Leading-Edge Wireless Solutions Highlight 2002 Wireless Systems Design Conference
San Jose, CA, February 26, 2002 – Booth 829 to Feature Bluetooth™, GPS & Wireless LAN Solutions Along with PLLs, Digital-Analog Converters and Application Specific Memories
February 26, 2002 San Jose, CA: Fujitsu New Bluetooth Baseband IC Series Provides On-board Flash, USB Ports
San Jose, CA, February 26, 2002 – Built Around Parthus’ BlueStream Core, New MB86C00, MBG011 Target Hands-Free Cell Phones and Other Mobile Wireless Applications
October 23, 2001 San Jose, CA: Fujitsu Brings Advanced Memory, ASIC Technology to Network Processor Conference
San Jose, CA, October 23, 2001 – Fast Cycle RAM, 0.18-micron ASIC Highlight FMA Exhibit
May 29, 2001 San Jose, CA: Fujitsu' High-Density Digital Chips Lead Success of TRW's Astrolink Payload
San Jose, CA, May 29, 2001 – A set of extremely high-density ASICs designed by TRW (NYSE: TRW) and fabricated by Fujitsu Microelectronics, Inc. (FMI) for TRW's new Astrolink global broadband communications system has completed flight production tests, a major step in meeting Astrolink hardware milestones. TRW will provide the Astrolink payload to Lockheed Martin Commercial Space Systems, the prime contractor for the Astrolink Space segment.
May 22, 2001 San Jose, CA: Fujitsu' New 2.5 Gbps Transceiver Macro Designed for High-Bandwidth
San Jose, CA, May 22, 2001 – Triple-Mode Input/Output Data-Transfer Capability, Low Power Provide Optimal IP for Next-Generation Network Systems
May 9, 2001 Redondo Beach, CA: TRW and Fujitsu Complete Flight Production of Extremely High-Density Digital Chips
Redondo Beach, CA, May 9, 2001 – Flight production of extremely high-density digital integrated circuits for the TRW-built (TRW:NYSE) Astrolink communications payload is now complete, demonstrating rapid progress in meeting key hardware milestones.
February 13, 2001 San Jose, CA: Fujitsu Brings Latest Wireless System-on-Chip Technology to Annual Wireless Symposium
San Jose, CA, February 13, 2001 – New SAW filters, Digital-to-Analog Converters, PLLs Ready for Next Generation of Cellular, PDA, Handheld Products
January 30, 2001 San Jose, CA: Fujitsu Introduces New SAW Filters in Ultra-Small Packages
San Jose, CA, January 30, 2001 – New Series is Based on Lithium Tantalate, Available in Small Surface Mount Packages
January 29, 2001 San Jose, CA: Fujitsu Develops New Complex, High-Pin-Count ASIC Series for Foundry Networks
San Jose, CA, January 29, 2001 – Designed for Use in Foundry Networks' Switching and Routing Products

Foundry Services Press Releases

August 27, 2009 Tokyo and Hsin-chu, Taiwan: Fujitsu Microelectronics and TSMC to Collaborate on 28nm Process Technology
Tokyo and Hsin-chu, Taiwan, August 27, 2009 – Fujitsu Microelectronics Limited and Taiwan Semiconductor Manufacturing Company, Ltd. (TWSE: 2330, NYSE: TSM) today announced that they have agreed to collaborate on 28-nanometer (nm) process technology targeted for foundry production of Fujitsu Microelectronics’ 28nm logic ICs and to jointly develop an enhanced 28nm high-performance process technology by utilizing TSMC’s advanced technology platform.
April 7, 2009 Sunnyvale, CA: New White Paper from Fujitsu Microelectronics Describes PSP Model Technology in RF CMOS Design
Sunnyvale, CA, April 7, 2009 – Fujitsu Microelectronics America, Inc. (FMA) today published a new white paper entitled “The PSP Model in RF CMOS Design.”
November 12, 2008 Sunnyvale, CA: Fujitsu Providing 65nm RF CMOS Manufacturing Services with Advanced RF CMOS Process Design Kit
Sunnyvale, CA, November 12, 2008 – Platforms are Ideal for High-performance and Low-power Wireless SoCs
March 31, 2008 Sunnyvale, CA: Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group
May 24, 2007 Tokyo, Japan, Sunnyvale and Newport Beach, CA: Jazz and Fujitsu to Collaborate on Providing Complete Solution for 90nm and 65nm RF CMOS Foundry Customers
Tokyo, Japan, Sunnyvale and Newport Beach, CA, May 24, 2007 – IP Providers Transmeta and Tensilica to Join Fujitsu in Booth 833
January 26, 2007 Sunnyvale, CA: Fujitsu to Feature Advanced 65-Nanometer Process Technology, 10Gbps Ethernet Switch Chip at DesignCon 2007
Sunnyvale, CA, January 26, 2007 – IP Providers Transmeta and Tensilica to Join Fujitsu in Booth 833
October 10, 2006 San Jose, CA: Fujitsu to Feature World-class 65-Nanometer Process Technology for Advanced Networking, Mobile Applications at 12th Annual FSA Conference
San Jose, CA, October 10, 2006 – CS200HP / 200A, Part of Fujitsu’s Turnkey Services for Customers, at Booth #410
September 15, 2006 Tokyo, Japan: Fujitsu and Advantest to Establish Joint Venture to Create Semiconductor Prototypes Using Electron Beam Direct Lithography
Tokyo, Japan, September 15, 2006 – Fujitsu Limited and Advantest Corporation today announced plans to establish a joint venture to create prototype semiconductors by using electron beam direct lithography.
June 13, 2006 Tokyo, Japan: Fujitsu, NEC Electronics, Renesas, and Toshiba to Aim for Standardization of Semiconductor Process Technology for Next-Generation LSI
Tokyo, Japan, June 13, 2006 – Fujitsu Limited ("Fujitsu"), NEC Electronics Corporation ("NEC Electronics"), Renesas Technology Corp. ("Renesas Technology"), and Toshiba Corporation ("Toshiba") today announced that they have agreed to seek to define a standard process technology that can be applied to the manufacture of advanced system LSIs at the 45-nanometer (nm)* generation and beyond.
June 13, 2006 Tokyo, Japan: Fujitsu and Lattice Strengthen Partnership
Tokyo, Japan, June 13, 2006 – Fujitsu Limited and Lattice Semiconductor Corporation today announced that they have signed a distribution agreement in which Fujitsu Devices Inc. will be added as an authorized distributor of Lattice's FPGA/PLD products in Japan.
June 13, 2006 Sunnyvale, CA: Fujitsu to Feature Success at 65-Nanometer Process Technology at Fabless Semiconductor Association Forum June 14
Sunnyvale, CA, June 13, 2006 – “Fujitsu at 65nm” Presentation to Focus on Challenges of Deep Submicron Process
February 6, 2006 Sunnyvale, CA: Fujitsu to Highlight New 65-Nanometer Process Technologies, 10 Gigabit Ethernet and the WiMAX SoC at Annual DesignCon 2006, Booth 641
Sunnyvale, CA, February 6, 2006 – “65nm CMOS Process Technology” TecPreview Session Set for Feb. 7 at 10:15 a.m.
January 11, 2006 Tokyo, Japan: Fujitsu to Construct New Fab for Logic Chips Employing 65nm Process Technology and 300mm Wafers
Tokyo, Japan, January 11, 2006 – Fujitsu Limited today announced that it will construct a new fab to mass-produce logic semiconductors employing leading-edge 65-nanometer (nm) process technology and 300 millimeter (mm) wafers.
November 2, 2005 Fremont, CA and Tokyo, Japan: Fujitsu to Manufacture Leading-edge 3D Graphics Processors for S3 Graphics
Fremont, CA and Tokyo, Japan, November 2, 2005 – Fujitsu's 90 nanometer technology enables high performance graphics chips featuring high speeds and low power consumption
October 3, 2005 Sunnyvale, CA: Fujitsu to Feature Industry-Leading Process Technology, Packaging Services in Booth 535 at Annual Fabless Semiconductor Association Conference
Sunnyvale, CA, October 3, 2005 – Senior VP Keith Horn to Present "Beyond the IDM Business Model" October 5
September 20, 2005 Sunnyvale, CA: Fujitsu Introduces World-class 65-Nanometer Process Technology for Advanced Server, Mobile Applications
Sunnyvale, CA, September 20, 2005 – CS200/CS200A Offers Top Performance, Low Power with 25 Percent Gate Size Reduction
April 18, 2005 Sunnyvale, CA: IDM Business Model, Advanced Design and Technology Processes Detailed in New White Paper from Fujitsu
Sunnyvale, CA, April 18, 2005 – Describes Complete Capability Portfolio for 300mm, 90nm Custom Silicon
March 23, 2004 Tokyo: Fujitsu to Manufacture Leading-Edge FPGA Products for Lattice Semiconductor
Tokyo, March 23, 2004 – Lattice Semiconductor Announces FPGA Technology, Product Roadmap; Plans to Invest in Fujitsu's New 300mm Fab
March 19, 2004 Tokyo: Fujitsu to Construct New Facility for Mass Production of Logic Chips Using 90nm and 65nm Process Technology
Tokyo, March 19, 2004 – New fab will use 300mm wafers
March 29, 2002 Tokyo: Fujitsu Launches World's First 90-Nanometer LSI Process Pilot roduction Line at Akiruno Technology Center

Advanced Packaging Press Releases

November 12, 2008 Sunnyvale, CA: Fujitsu Providing 65nm RF CMOS Manufacturing Services with Advanced RF CMOS Process Design Kit
Sunnyvale, CA, November 12, 2008 – Platforms are Ideal for High-performance and Low-power Wireless SoCs
March 31, 2008 Sunnyvale, CA: Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group
August 27, 2003 Tokyo: Fujitsu to Consolidate Its Japan-Based Semiconductor Assembly and Testing Operations
Tokyo, August 27, 2003 – Fujitsu Limited today announced that it will consolidate its four semiconductor back-end assembly and testing subsidiaries in Japan into one newly-established company with four facilities. The new company, Fujitsu Integrated Microtechnology Limited, will focus on the back-end assembly and testing of logic chips, integrating the unique product lines and technological strengths of each of the four units into one highly competitive organization with improved efficiencies.
July 15, 2002 San Jose, CA: Fujitsu Introduces Industry's Smallest Chip-Size Module with Advanced System-in-Package Technology
San Jose, CA, July 15, 2002 – SiP Technology Enables MCPs as Small as their Largest Individual Device
May 20, 2002 Santa Clara, CA: ISSI Introduces New Stacked Multi-Chip Modules for Mobile Communications Market
Santa Clara, CA, May 20, 2002 – Integrated Silicon Solution, Inc. (Nasdaq: ISSI), a leader in advanced memory solutions, today introduced a new family of stacked multi-chip package (MCP) Flash and SRAM memory products. The new products combine ISSI's 8Mb low-power asynchronous SRAM with Fujitsu's 64Mb or 32Mb NOR-type Flash memory in a stacked multi-chip module with fine-pitch ball grid array (FBGA).
April 23, 2002 Tokyo and Chandler, AZ: Amkor & Fujitsu Announce Factory Outsourcing Venture
Tokyo and Chandler, AZ, April 23, 2002 – Amkor Technology, Inc. (Nasdaq: AMKR) and Fujitsu Limited (TSE: 6702) have signed a non-binding memorandum of understanding calling for Amkor's staged equity purchase of Fujitsu's semiconductor assembly and test operation located in Kagoshima, Japan. The agreement would significantly enhance Amkor's penetration of the Japanese market for outsourced semiconductor assembly and test while enabling Fujitsu to improve production competitiveness and focus on its core business operations.
March 25, 2002 San Jose, CA: Fujitsu Introduces Industry's First Eight-Stacked Multi-Chip Package for Mobile
San Jose, CA, March 25, 2002 – IC Cards, Compact Hard Drives Now Support Three-stacked Chips in One Package
February 20, 2002 San Jose, CA: Fujitsu Introduces High-Capacity Four-Stacked MCP and Two-Stacked MCP
San Jose, CA, February 20, 2002 – Two New MCPs Provide Industry's Largest Memory Capacity for Mobile Devices
October 10, 2001 Santa Clara, CA: Fujitsu Showcases New Bump FCBGA, CSPs, Stacked Multi-Chips
Santa Clara, CA, October 10, 2001 – Fujitsu Microelectronics Showcases New Bump FCBGA, CSPs, Stacked Multi-Chips at Fabless Semiconductor Association Suppliers Expo, First 800mm Square Die, New Fine Pitch Bump Packages Ready by Year End
July 16, 2001 San Jose, CA: Fujitsu Features Package Solutions Including Bump FCBGA, CSPs, Lead-Free, Stacked Multi-Chip
San Jose, CA, July 16, 2001 – Fujitsu Microelectronics, Inc. (FMI), a world leader in advanced semiconductor packaging technologies, will showcase its new Flip-Chip Ball Grid Array (FCBGA) lead-free packages and other chip scale packages (CSP) at the annual SEMICON West, July 18-20, at the San Jose Convention Center (booth number 9516).
July 12, 2001 San Jose, CA: Fujitsu Delivers Industry's First Copper FCBGA Packaging to Altera Corporation
San Jose, CA, July 12, 2001 – Fujitsu Microelectronics, Inc. (FMI) today announced it has delivered the first copper interconnect Flip-Chip Ball Grid Array (FCBGA) package for Altera Corporation's (NASDAQ:ALTR) Programmable Logic Devices (PLDs).
May 22, 2001 San Jose, CA: Fujitsu Announces First Packaging Options without Lead (Pb)
San Jose, CA, May 22, 2001 – Fujitsu Microelectronics, Inc. (FMI) today introduced its new lead-free Ball Grid Array (BGA) and Quad Flat Pack packages, the first products in the company's program to supply only lead-free components and packages. A broad range of ASIC, memory, microcontroller and other LSI devices are now available in these lead-free packages.
March 13, 2001 San Jose, CA: Fujitsu Announces Capacity Expansion of Wafer Bumping and FlipChip-BGA Assembly Services
San Jose, CA, March 13, 2001 – Flip-chip advanced packaging is key feature for high-frequency devices

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