FUJITSU

Packages

Features

  • Superior thermal characteristics.
  • Superior support for multi-pin.
  • Package sizes at 27mmSQ and 35mmSQ are available.

TEBGA Package external view

TEBGA Package cross section

Multi-pin BGA Package road map

Fujitsu Microelectronics will provide the most suitable SiP to the customer's requirements with our extensive implementation technologies.
Please do not hesitate to contact us.

TEBGA Package line-up

Pin count Package size (mm) Pin arrangement Pin pitch (mm)
X Y
320 (IO256+TB64) 27.0 27.0 4 rows 1.27
416 (IO352+TB64) 27.0 27.0 4 rows 1.00
416 (IO352+TB64) 35.0 35.0 4 rows 1.27
480 (IO416+TB64) 27.0 27.0 5 rows 1.00
484 (IO420+TB64) 27.0 27.0 5 rows 1.00
484 (IO420+TB64) 35.0 35.0 5 rows 1.27
520 (IO420+TB100) 35.0 35.0 5 rows 1.27
543 (IO479+TB64) 27.0 27.0 6 rows 1.00
544 (IO480+TB64) 27.0 27.0 6 rows 1.00
676 (IO676) 27.0 27.0 Full Matrix 1.00
676 (IO576+TB100) 35.0 35.0 5 rows 1.00
772 (IO672+TB100) 35.0 35.0 6 rows 1.00
808 (IO708+TB100) 35.0 35.0 5 + 2 rows 1.00
868 (IO672+TB196) 35.0 35.0 6 rows 1.00
900 (IO756+TB144) 35.0 35.0 7 rows 1.00
1156 (IO1156) 35.0 35.0 Full Matrix 1.00

*TB : Thermal Ball