ASIC

Design Resources

Fujitsu's innovative design methodology incorporates the best third-party and in-house EDA tools. The company's hierarchical physical design flow provides a scalable solution for implementation of designs of up to 91 million gates. Fujitsu's methodology resolves issues associated with nanometer design upfront through extensive use of physical synthesis technologies, multi-Vth library support, power-supply integrity analysis, Xtalk noise avoidance, analysis, and fixing. Combined with a robust verification environment, these capabilities enable Fujitsu to achieve rapid closure in the timing, signal integrity, and power arenas, shortening the time to silicon.

Methodology
Fujitsu's design methodology ensures first-silicon success by integrating proprietary point tools with the most popular industry-standard CAD tools.

Tools
Fujitsu's design environment utilizes industry-leading tools from major EDA companies such as Synopsys, Cadence, Synplicity, and Mentor Graphics. Internally developed tools supplement this environment at specific points, resulting in an integrated and efficient system.

Design Services
Fujitsu's design services are integrated for optimum effectiveness.