THE POSSIBILITIES ARE INFINITE


MB90540G Series

2xCAN

DESCRIPTION

The MB90540 series with FULL-CAN and FLASH ROM is specially designed for automotive and industrial applications. Its main features are two on board CAN Interfaces (one for MB90V545 series), which conform to V2.0 Part A and Part B, supporting very flexible message buffering. Thus, offering more functions than a normal full CAN approach. In latest CMOS technology Fujitsu offers on-chip FLASH-ROM program memory. An internal voltage booster substitutes the necessity of a second programming voltage. An on board voltage regulator provides 3V to the internal MCU core. This constitutes a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier, provides an internal 62.5 nsec instruction cycle time with an external 4 MHz clock. Further more it features 4 channels Output Capture Units and 8 channels Input Capture Units with a 16-bit free running timer. Two UARTs constitute additional functionality for communication purposes. The external bus interface allows full use to be made of the 16MByte address space.

FEATURES

  • 16-bit core CPU; 4MHz external clock (16 MHz internal, 62.5 nsec instr. cycle time)
  • 32 kHz Subsystem Clock
  • New 0.5µm CMOS Process Technology
  • Internal voltage regulator supports 3V MCU core, offering low EMI and low power consumption figures
  • FULL-CAN interfaces (MB90540: 2 interf.; MB90545: 1 interf.); conform to Version 2.0 Part A and Part B, flexible message buffering (mailbox and FIFO buffering can be mixed)
  • Powerful interrupt functions (8 progr. priority levels; 8 external interrupts)
  • EI²OS - Automatic transfer function indep.of CPU; 10 ch. of intelligent I/O Services
  • 18-bit Time-base counter
  • Watchdog Timer
  • 2 full duplex UARTs; UART0 supports 10.4 KBaud (USA standard), UART 1 also for serial transfer with clock (SCI) programmable
  • Serial I/O: 1ch for synchronous data transfer
  • A/D Converter: 8 ch. analog inputs (Resolution 10 bits or 8 bits)
  • 16-bit reload timer x 2 ch
  • ICU (Input capture) 16bit x 8 ch
  • OCU (Output capture) 16bit x 4ch
  • 16-bit Programmable Pulse Generator 4 ch
  • External bus interface
  • Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different addressing modes; barrel shift; variety of pointers)
  • 4-byte instruction execution queue
  • signed multiply (16bit x 16bit) and divide (32bit/16bit) instructions available
  • Program Patch Function
  • Fast Interrupt processing
  • Low Power Consumption - 10 different power saving modes: (Sleep, Stop, CPU intermittent mode, Hardware Standby,...)
  • Package: 100-pin plastic QFP

DOCUMENTATION

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PDF Datasheet V5-00 (67 pages, 747 KB)

PDF Hardware Manual V5-00 (596 pages, 4960 KB)

PDF Hardware Manual Corrections X1-00 (9 pages, 455 KB)

PDF Hardware Manual Errata X2-03 (9 pages, 152 KB)

PDF PFV package 0.5mm LQFP (1 page, 104 KB)

PDF PF package 0.65mm QFP (1 page, 109 KB)

PDF CR-package 256-pin Xmm PGA (1 page, 39 KB)

Parts Table

Device Part Number MB90543G MB90543GS MB90F543G MB90F543GS
ROM (kB)
128 128 128 128
ROM (Type)
Mask Mask Flash Flash
RAM (Bytes)
6144 6144 6144 6144
MaxIntClockFrequ(MHz)
16 16 16 16
32KHz Sub Clock
Yes No Yes No
Min I/O
1 1 1 1
Max I/O
81 81 81 81
External Interrupts
8 8 8 8
ADC
8 8 8 8
Timer / Counter 8 bit
NA NA NA NA
Timer / Counter 16 bit
2 2 2 2
Ser I/O 8 bit
1 1 1 1
I2C
NA NA NA NA
Buzzer
NA NA NA NA
LCD segment lines
NA NA NA NA
Rem Ctrl Carr Freq Gen
NA NA NA NA
External Bus Interface
Yes Yes Yes Yes
Chip Selects
NA NA NA NA
Vcc Min
3 3 4.5 4.5
Vcc Max
5.5 5.5 5.5 5.5
Power Saving Modes
Yes Yes Yes Yes
Pin Count
100 100 100 100