DESCRIPTION

The MB90440G series with FULL-CAN and FLASH ROM is specially designed for automotive and industrial applications. Its main features are three on board CAN Interfaces, which conform to V2.0 Part A and Part B, supporting very flexible message buffering. Thus, offering more functions than a normal full CAN approach. In latest CMOS technology Fujitsu offers on-chip FLASH-ROM program memory. An internal voltage booster substitutes the necessity of a second programming voltage. An on board voltage regulator provides 3V to the internal MCU core. This constitutes a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier, provides an internal 62.5 nsec instruction cycle time with an external 4 MHz clock. Further more it features 4 channels Output Capture Units and 8 channels Input Capture Units with a 16-bit free running timer. Two UARTs constitute additional functionality for communication purposes. The external bus interface allows full use to be made of the 16MByte address space

FEATURES

• 16-bit core CPU; 4MHz external clock (16 MHz internal, 62.5 nsec instr. cycle time)
• 32 kHz Subsystem Clock
• New 0.5µm CMOS Process Technology
• Internal voltage regulator supports 3V MCU core, offering low EMI and low power consumption figures.
• FULL-CAN interface 3 ch; conform to Version 2.0 Part A and Part B, flexible message buffering (mailbox and FIFO buffering can be mixed)
• Powerful interrupt functions (8 progr. priority levels; 8 external interrupts)
• EI²OS - Automatic transfer function indep.of CPU; 10 ch. of intelligent I/O Services
• 18-bit Time-base counter
• Watchdog Timer
• 2 full duplex UARTs; UART0 supports 10.4 KBaud (USA standard), UART 1 also for serial transfer with clock (SCI) programmable
• Serial I/O: 1ch for synchronous data transfer
• A/D Converter: 8 ch. analog inputs (Resolution 10 bits or 8 bits)
• 16-bit reload timer x 2 ch
• ICU (Input capture) 16bit x 8 ch
• OCU (Output capture) 16bit x 4ch
• 16-bit Programmable Pulse Generator 4 ch
• External bus interface
• Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different addressing modes; barrel shift; variety of pointers)
• 4-byte instruction execution queue
• signed multiply (16bit x 16bit) and divide (32bit/16bit) instructions available
• Program Patch Function
• Fast Interrupt processing
• Low Power Consumption - 10 different power saving modes: (Sleep, Stop, CPU intermittent mode, Hardware Standby,...)
• Package: 100-pin plastic QFP

DOCUMENTATION

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PDF Datasheet V2-00 (61 pages, 646 KB)

PDF Hardware Manual V2-00 (564 pages, 15190 KB)

PDF Hardware Manual Correction X1-04 (12 pages, 235 KB)

PDF F2MC-16LX Standby Cancel Failure Documentation (25 pages, 422 KB)

PDF PF package 0.65mm QFP (1 page, 109 KB)

PDF CR-package 256-pin Xmm PGA (1 page, 39 KB)