FUJITSU


MB90385 Series

CAN

DESCRIPTION

MB90385 series devices are general-purpose high-performance 16-bit micro controllers designed for process control of consumer products, which require high-speed real-time processing. The devices of this series have the built-in full-CAN interface. The system, inheriting the architecture of F²MC* family, employs additional instruction ready for high-level languages, expanded addressing mode, enhanced multiply-divide instructions, and enriched bit-processing instructions. Furthermore, employment of 32-bit accumulator achieves processing of long-word data (32 bits). The peripheral resources of MB90385 series include the following: 8/10-bit A/D converter, UART (SCI), 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture 0, 1, 2, 3 (ICU)), and CAN controller.
MC*: "F²MC", an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd.

FEATURES

  • Clock
    • Built-in PLL clock frequency multiplication circuit
    • Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz).
    • Operation by sub-clock (8.192 kHz) is allowed.
    • Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multiplied PLL clock).
  • 16 Mbyte CPU memory space
    • Internal 24-bit addressing
  • Instruction system best suited to controller
    • Wide choice of data types (bit, byte, word, and long word)
    • Wide choice of addressing modes (23 types)
    • Enhanced multiply-divide instructions and RETI instructions
    • Enhanced high-precision computing with 32-bit accumulator
  • Instruction system compatible with high-level language (C language) and multitask
    • Employing system stack pointer
    • Enhanced various pointer indirect instructions
    • Barrel shift instructions
  • Increased processing speed
    • 4-byte instruction queue
  • Powerful interrupt function with 8 levels and 34 factors
  • Automatic data transfer function independent of CPU
    • Expanded intelligent I/O service function (EI²OS): Maximum of 16 channels
  • Low-power consumption (standby) mode
    • Sleep mode (mode in which CPU operating clock is stopped)
    • Timebase timer mode (mode in which operations other than timebase timer and watch timer are stopped)
    • Stop mode (mode in which all oscillations are stopped)
    • CPU intermittent operation mode
    • Watch mode
  • Process: (CMOS technology)
  • I/O port
    • General-purpose input/output port (CMOS output): 34 ports(MB90387, MB90F387) (including 4 high-current output ports) (When sub clock is not used, 36 ports(MB90387S, MB90F387S)
  • Timer
    • Time-base timer, clock timer, watchdog timer: 1 channel
    • 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels
    • 16-bit reload timer: 2 channels
    • 16-bit input/output timer
      • 16-bit free run timer: 1 channel
      • 16-bit input capture: (ICU): 4 channels
        Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin input.
  • CAN controller: 1 channel
    • Compliant with Ver2.0A and Ver2.0B CAN specifications.
    • 8 built-in message buffers.
    • Transmission rate of 10 Kbps to 1 Mbps (by 16 MHz machine clock)
    • CAN wake-up
  • UART (SCI): 1 channel
    • Equipped with full-duplex double buffer
    • Clock-asynchronous or clock-synchronous serial transmission is available
  • DTP/External interrupt: 4 channels, CAN wakeup: 1 channel
    • Module for activation of expanded intelligent I/O service (EI2OS), and generation of external interrupt.
  • Delay interrupt generator module
    • Generates interrupt request for task switching.
  • 8/10-bit A/D converter: 8 channels
    • Resolution is selectable between 8-bit and 10-bit.
    • Activation by external trigger input is allowed.
    • Conversion time: 6.125 µs (at 16-MHz machine clock, including sampling time)
  • Program patch function
    • Address matching detection for 2 address pointers.
  • Package: 48-pin plastic-LQFP

DOCUMENTATION

Note: The use of Adobe® Acrobat Reader is recommended to have all download and browsing features available for pdf files.

PDF Datasheet V5-00 (84 pages, 2.1MB)

PDF Hardware Manual V3-00 (678 pages, 4.85 MB)

PDF Hardware Manual Corrections X1-00 (6 pages, 361 KB)

PDF Hardware Manual Errata V1-00 (11 pages, 144 KB)

PDF F2MC-16LX Standby Cancel Failure Documentation (25 pages, 422 KB)

PDF PFV package 0.5mm LQFP (1 page, 60 KB)

PDF CR-package 256-pin Xmm PGA (1 page, 39 KB)

Parts Table

Device Part Number MB90387 MB90387S MB90F387 MB90F387S
ROM (kB)
64 64 64 64
ROM (Type)
Mask Mask Flash Flash
RAM (Bytes)
2048 2048 2048 2048
MaxIntClockFrequ(MHz)
16 16 16 16
32KHz Sub Clock
Yes No Yes No
Min I/O
7 9 7 9
Max I/O
34 36 34 36
External Interrupts
4 4 4 4
ADC
8 8 8 8
Timer / Counter 8 bit
NA NA NA NA
Timer / Counter 16 bit
2 2 2 2
Ser I/O 8 bit
NA NA NA NA
I2C
NA NA NA NA
Buzzer
NA NA NA NA
LCD segment lines
NA NA NA NA
Rem Ctrl Carr Freq Gen
NA NA NA NA
External Bus Interface
No No No No
Chip Selects
NA NA NA NA
Vcc Min
4.5 4.5 4.5 4.5
Vcc Max
5.5 5.5 5.5 5.5
Power Saving Modes
Yes Yes Yes Yes
Pin Count
48 48 48 48