ASIC

IPWare™ and Cores

Related Links:
VOIP

Fujitsu's SoC design methodology and solution platform provide seamless integration of IP cores into system LSI. The IPWare library consists of diverse sets of reusable system building blocks as highlighted below:

• Microprocessor and DSP cores :
  ARC tangent -A4 (DSP-enhanced), ARM7TDMI, ARM926 EJ-S, ARM946 E-S,
  Tensilica Diamond Cores:108Mini, 212GP, 232L, 570T, 330HiFi, 545CK
• Multimedia access IP cores:
  VOIP (4-channel), AC97 controller, Video Encoder, MPEG4, MJPEG, and wireless (Bluetooth, 802.1x)
• Standard I/O interface cores :
  USB1.1, USB2.0 (PHY and Device Controller), PCI2.2, PCIX, 1394 (Link and PHY)
• Mixed signal cores:
  High precision ADCs, DACs, PLLs and Embedded RAM/ROM
• Networking and communication cores:
  10/100 MAC, 1G-bit MAC, 10G-bit MAC, SONET Framers, UTOPIA I/II, POS-PHY Levels 3 & 4, XAUI and 8b/10b
• Bus bridges:
  ARM-AHB, PCI-AHB and ARC-AHB
• Memory controllers:
  SRAM/FLASH, SDRAM, FCRAM, Memory Stick, and DDR

SOC Application Lab
Fujitsu SoC LAB demonstrates real capability in SoC implementation by bridging the gap between hardware and software design. Using Fujitsu's solution platforms, it provides a flexible design environment for system development, emulation and evaluation. Capabilities include:

• ARM and ARC SoC design
• Complete VOIP system
• Integrated Bluetooth base-band and RF