Spread Spectrum Clock Generator (SSCG)

Frequently Asked Questions

Q1. What are the target applications of SSCGs?
Q2. What is the definition of jitter?
Q3. What are the other advantages of SSCGs besides reducing EMI?
Q4. How does the SSCG reduce the emission spike?
Q5. Are the functions and settings of MB88151A/152A/153A/154A identical to that of our competitors?
Q6. Is it possible to change the pin setting while operating?
Q7. What is the difference between input frequency and output frequency?
Q8. What changes when the power supply is turned on and off?
Q9. Are the outputs of REFOUT and CKOUT synchronized with XIN?
Q10. Are there matched characteristics between the SSCG and the crystal oscillator (or the ceramic resonator)?
Q11. Is there a modulation profile available for the SSCG?
Q12. Is it possible to include a SSCG in an ASIC?
Q13. What is a SSCG?
Q14. What is a reference clock?
Q15. Do input clock and output clock synchronize?

Q1. What are the target applications of SSCGs?
Some of the target applications are printers, copiers, LCDs, projectors, navigation systems and PC graphics cards. Customers will need a SSCG when the system bus clock frequency exceeds 30MHz and the equipment cover is made of plastic.

Q2. What is the definition of jitter?
Cycle - Cycle jitter is defined as the difference between a certain cycle and the cycle immediately after it or a cycle immediately before it.

Period - Period jitter is defined as the difference between the ideal clock and the measurement clock.

Q3. What are the other advantages of SSCGs besides reducing EMI?
Lowest power consumption: 5.5mA @24MHz
New small package products: MB88155 and MB88156

Q4. How does the SSCG reduce the emission spike?
The emission spike is reduced at the fundamental frequency and harmonics level.

Q5. Are the functions and settings of MB88151A/152A/153A/154A identical to that of our competitors?
There are differences in functions and settings. For details, please check the datasheets.

Q6. Is it possible to change the pin setting while operating?
It’s possible, however Lockup time is needed until the PLL becomes stable.

Q7. What is the difference between input frequency and output frequency?
Within +/- 1ppm standard deviation, when modulation is disabled.

Q8. What changes when the power supply is turned on and off?
Power on: Wait time for oscillation stabilization and PLL Lockup time is needed.
Power off: Setting pins and XIN terminal are switched to GND before power off.

Q9. Are the outputs of REFOUT and CKOUT synchronized with XIN?
REFOUT is always synchronized, but CKOUT is not. CKOUT output is through the PLL even if modulation is disabled.

Q10. Are there matched characteristics between the SSCG and the crystal oscillator (or the ceramic resonator)?
A complete evaluation is required for each oscillator type.

Q11. Is there a modulation profile available for the SSCG?
Compound modulation frequency makes Uniformed-Peak Spectrum possible. Fujitsu does not provide a modulation profile.

Q12. Is it possible to include a SSCG in an ASIC?
Yes, it is possible.

Q13. What is a SSCG?
A SSCG is a clock generator, which decreases EMI by changing a clock frequency slowly and slightly in order to distribute the energy of the output clock.

Q14. What is a reference clock?
A reference clock is a buffer output of the original oscillation. It is used for the system that cannot support a Modulation Clock.

Q15. Do input clock and output clock synchronize?
No, they don’t synchronize (output clock is generated from the PLL).