Fujitsu Microelectronics America, Inc.

Fujitsu Microelectronics Showcases New Bump FCBGA, CSPs, Stacked Multi-Chips at Fabless Semiconductor Association Suppliers Expo

Fujitsu Microelectronics Showcases New Bump FCBGA, CSPs, Stacked Multi-Chips at Fabless Semiconductor Association Suppliers Expo, First 800mm Square Die, New Fine Pitch Bump Packages Ready by Year End

Santa Clara, CA, October 10, 2001 — Fujitsu Microelectronics America (FMA) is showcasing its industry-leading Flip-Chip Ball Grid Array (FCBGA) and other chip scale packages at the annual Fabless Semiconductor Association Suppliers Expo, October 10 to 11 at the Santa Clara Convention Center.

Fujitsu is displaying its CSP options - including its wafer-level, RF-enhanced, stacked and multi-die versions. The company is also showing its wafer-bumping and flip-chip assembly technologies for networking, communications and complex computing applications, such as Programmable Logic Devices (PLDs), high-end ASICs, Digital Signal Processors (DSPs) and microprocessors.

Fujitsu's Applied CSP Packaging Includes BCC, Stacked Multi-Chip
With a qualified 0.5 mm maximum height, Fujitsu's BCC++ package is ideal for third-generation (3G) cellular phones, Bluetooth, IEEE 802.11b and Dense Wave Division Multiplexing LSIs.

Another new low-profile CSP, the extra-thin 0.5h-FLGA (Fine-pitch Land Grid Array) has an external solder bump less than 0.5 mm in total height. The package, which is ideal for mini disk drives, digital cameras and portable audio players, uses polyimide tape to achieve the extra low profile and JEDEC MSL 2 compatibility at lead-free processing temperatures. Fujitsu can also provide a variety of multi-die combinations in stacked MCP, such as memory/memory, memory/logic and logic/logic, with a choice of wire bonding/wire bonding or wire bonding/flip-chip bonding interconnection. Fujitsu now manufactures a 48-pin wafer-level CSP - the Super CSP - with 0.5 mm ball pitch for memory and microcontroller applications.

Full Range of Packaging Options
Fujitsu now offers a full range of packaging options, including mixed-signal, high voltage and application specific processes, featuring backplane LSI for microdisplays and CMOS image sensors.

Fujitsu fabricates packages for 600 square millimeters and larger dies. Later this year the company will unveil the first 800 square millimeter die in an FCBGA package. Bumping can also be achieved on a variety of die-pad materials including copper.

The company also has developed a fine pitch bump of 120 µm and will begin shipments in December. It offers copper redistribution services to adapt peripheral die pads to an area-array configuration, along with sorting and probing services using vertical-probing techniques for increased accuracy on area-array bumped wafers.

"Fujitsu now provides the industry's most complete range of packaging technology options, with materials sets that are based on customers' requirements," said Dennis Stephenson, director of business development for FMA's Advanced Packaging Technology group. "We now offer the largest die-to-substrate ratio for comprehensive SOC designs using industry's broadest selection of laminate, buildup and high CTE glass ceramics."

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About Fujitsu Microelectronics America, Inc.

Fujitsu Microelectronics America is a leading supplier of a broad range of semiconductors and electronic devices. For product information, please call 1-800-866-8608, or visit the company web site at http://www.fujitsumicro.com/apt/Main01.asp

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