Fujitsu Microelectronics America, Inc.

Fujitsu Microelectronics Features Package Solutions Including Bump FCBGA, CSPs, Lead-Free, Stacked Multi-Chip at SEMICON West 2001

San Jose, CA, July 16, 2001 — Fujitsu Microelectronics, Inc. (FMI), a world leader in advanced semiconductor packaging technologies, will showcase its new Flip-Chip Ball Grid Array (FCBGA) lead-free packages and other chip scale packages (CSP) at the annual SEMICON West, July 18-20, at the San Jose Convention Center (booth number 9516).

Fujitsu will display its CSP options, including its wafer-level, RF-enhanced, stacked and multi-die versions, as well as its wafer-bumping and flip-chip assembly technologies for networking, communications and complex computing applications. These solutions are essential for applications for Programmable Logic Devices (PLDs), high-end ASICs, Digital Signal Processors (DSPs) and microprocessors. Fujitsu fabricates packages for unusually large dies, 600 square millimeters or larger. Later this year the company will unveil the first 800 square millimeters die in an FCBGA package. Bumping can now also be achieved on a variety of die-pad materials including copper.

"Fujitsu now provides the industry's most complete range of packaging technology options, including advanced BGA packages and a full roster of chip scale choices," said Dennis Stephenson, director of business development for FMI's Advanced Packaging Technology group. "We are working on the largest die available for comprehensive SOC designs. We already offer the widest selection of laminate, buildup and high CTE glass ceramics to provide the most appropriate materials set based on a customer's routing and frequency requirements, bump/ball counts and cost parameters."

Lead-free (Pb-Free) Packaging
Fujitsu is now shipping lead-free packages, including Quad Flat Packs (QFPs), CSPs and BGAs, which are 100 percent free of Pb. Some packages - such as Fujitsu's Bump Chip Carrier (BCC++) for RF devices and wafer-level CSP for flash memory - were designed as lead-free solutions from inception. Since 1999 Fujitsu has fabricated lead-free bumping using a proprietary single-die process for Fujitsu's high-end servers.

Very Fine Pitch Bump Slated for Fourth Quarter, 2001
Fujitsu is also developing a fine pitch bump of 120 µm and will begin shipments in the fourth quarter of 2001. Fujitsu can offer copper redistribution services to adapt peripheral die pads to an area-array configuration. Fujitsu can also offer sorting and probing services using vertical probing techniques for increased accuracy on area-array bumped wafers, as well as final testing services on a variety of test platforms and handlers.

Fujitsu's Applied CSP Packaging Includes BCC, Stacked Multi-Chip With a qualified 0.5 mm maximum height, Fujitsu's BCC++ package is ideal for third-generation (3G) cellular phones, Bluetooth, IEEE 802.11b and Dense Wave Division Multiplexing LSIs, according to Toshio Hamano, director of technology for FMI's Advanced Packaging Technology group.

"The new low-profile CSP is an extra-thin 0.5h-FLGA (Fine-pitch Land Grid Array) with an external solder bump less than 0.5 mm in total height, which is ideal for the mini disk drive, digital camera and portable audio player market," said Hamano. The package uses polyimide tape to achieve the extra low profile and JEDEC MSL 2 compatibility at a temperature of 260 degrees Centigrade. Fujitsu can also provide a variety of multi-die combinations in stacked MCP, such as memory/memory, memory/logic and logic/logic, with wire bonding/wire bonding and wire bonding/flip-chip bonding interconnection. Fujitsu now manufactures a 48-pin wafer-level CSP - the Super CSP - with 0.5 mm ball pitch for flash memory.

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About Fujitsu Microelectronics America, Inc.

Fujitsu Microelectronics, Inc. (FMI) designs, manufactures and markets a broad range of semiconductors and electronic devices. For product information, please call 1-800-866-8608, or visit the company web site at http://www.fujitsumicro.com/apt/Main01.asp

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