Publication Topic: Low Power Design Methods
- F. Fallah, S. Nassif, M. Pedram, "Technology, Circuit and Design Automation Techniques for Leakage Minimization of CMOS VLSI Circuits," Design Automation and Test in Europe (DATE), Mar 2005 (Master Course).
- F. Fallah, M. Pedram, "Design and Runtime Techniques for Leakage Control and Minimization of CMOS VLSI Circuits in Active and Sleep Modes," Asia South Pacific Design Automation Conference (ASP-DAC), Jan 2004 (Tutorial)
- F. Fallah, M. Pedram, "Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits," Special Low-Power LSI Issue of IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, 2005 .
- B. Amelifard, F. Fallah, M. Pedram, "Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-power High-performance Adders," Poster Session, International Symposium on Quality Electronic Design, San Jose, Mar 2005.
- A. Abdollahi, F. Fallah, M. Pedram, "Analysis and Optimization of Static Power Considering Transition Dependency of Leakage Current in VLSI Circuits," International Symposium on Quality Electronic Design, San Jose, Mar 2005.
- T. Ishihara, F. Fallah, "A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors," Design Automation and Test in Europe (DATE), Mar 2005.
- A. Hosangadi, F. Fallah, R. Kastner, "Reducing Hardware Complexity of Linear DSP Systems by Iteratively Eliminating Two-Term Common Subexpressions," Asia South Pacific Design Automation Conference (ASP-DAC), Jan 2005.
- A. Hosangadi, F. Fallah, R. Kastner, "Energy Efficient Hardware Synthesis of Polynomial Expressions," International Conference on VLSI Design, Jan 2005.
- A. Hosangadi, F. Fallah, R. Kastner, "Factoring and Eliminating Common Subexpressions in Polynomial Expressions," International Conference on Computer-Aided Design (ICCAD), Nov 2004.
- A. Hosangadi, F. Fallah, R. Kastner, "Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis," IEEE International Conference on Application-specific Systems, Architectures and Processors, September, 2004.
- Y. Aghaghiri, F. Fallah, M. Pedram, "Transition Reduction in Memory Buses Using Sector-based Encoding Techniques,"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Aug. 2004.
- A. Hosangadi, R. Kastner, F. Fallah, "Optimizing Polynomial Expressions by Factoring and Eliminating Common Subexpressions," International Workshop on Logic and Synthesis, Temecula, June 2004.
- A. Hosangadi, R. Kastner, F. Fallah, "Algebraic Techniques for Optimizing Polynomial Expressions," ODES-2: 2nd Workshop on Optimizations for DSP and Embedded Systems, Palo Alto, Mar. 2004.
- A. Abdollahi, F. Fallah, M. Pedram, "Leakage Current Reduction in CMOS VLSI Circuits by Input Vector Control," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Feb. 2004.
- A. Abdollahi, F. Fallah, I. Ghosh, M. Pedram, "Precomputation based Guarding for Dynamic and Leakage Power Reduction," International Conference on Computer Design (ICCD), San Jose, CA, Oct. 2003.
- A. Abdollahi, F. Fallah, M. Pedram, "Leakage Current Reduction in Sequential Circuits by Modifying the Scan Chains," International Symposium on Quality Electronic Design, San Jose, Mar. 2003.
- Y. Aghaghiri, F. Fallah, M. Pedram, "BEAM: Bus Encoding Based on Instruction-Set-Aware Memories," Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, Jan. 2003.
- E. G. Benowitz, M. D. Ercegovac, F. Fallah, "Reducing the Latency of Division Operations with Partial Caching," Asilomar Conference on Signals, Systems and Computers, Pacific Grove, Nov. 2002.
- Y. Aghaghiri, F. Fallah, M. Pedram, "A Class of Irredundant Encoding Techniques for Reducing Bus Power," Journal of World Scientific Publishing, Oct. 2002.
- A. Abdollahi, F. Fallah, M. Pedram, "Runtime Mechanisms for Leakage Reduction in CMOS VLSI Circuits," International Symposium on Low Power Electronics and Design (ISLPED), California, Aug. 2002. Also in International Workshop on Logic and Synthesis (IWLS), New Orleans, June 2002.
- Y. Aghaghiri, F. Fallah, M. Pedram, "Reducing Transitions on Memory Buses using Sector-Based Encoding Technique," International Symposium on Low Power Electronics and Design (ISLPED), California, Aug. 2002.
- Y. Aghaghiri, F. Fallah, M. Pedram, "EZ: A Class of Irredundant Low Power Codes for Data-Address and Multiplexed Address Buses," Design Automation and Test in Europe (DATE), France, Mar. 2002.
- Y. Aghaghiri, F. Fallah, M. Pedram, "ALBORZ: Address Level Bus Power Optimization," International Symposium on Quality Electronic Design (ISQED), California, Mar. 2002. Also in International Workshop on Logic and Synthesis (IWLS), California, June 2001.
- Y. Aghaghiri, F. Fallah, M. Pedram, "Irredundant Address Bus Encoding for low power," International Symposium on Low Power Electronics and Design (ISLPED), California, Aug. 2001.
