Intel® Xeon® Processor

Intel® Xeon® processor 7500 and E7 family have high-scalability. The Intel® Xeon® processors have an embedded high throughput system bus called Quick Path Interconnect (QPI). It enables inter-CPU, CPU-I/O, and CPU-memory communication.
The QPI is protected from failures by multi-leveled error detection and correction mechanisms. For instance, using Cyclic Redundancy Code (CRC) and re-transmitting data, the QPI can detect and recover errors. It also has the ability to handle unrecoverable errors by either degrading bus bandwidth or rerouting communications.

• The processor can protect itself using error detection and correction mechanisms for cache memory (Levels 1, 2, and 3), registers, ALU and TLB buffers.
• Memory is protected by Error Check and Correction, Double Data Device Correction, Single Data Device Correction, Memory Mirroring, and Memory Scrubbing.

*1) This section is based on articles in IDF FALL 2009.