FUJITSU FRAM Quality & Reliability

Reliability(1/4)

FRAM is a device with ferroelectric film, and therefore, the reliability of the ferroelectric film must be taken into account as a semiconductor device in addition to that of FRAM itself. A fall in the level of polarization must be notable to guarantee the reliability of ferroelectric film because it affects the data retention (the data holding characteristic) and fatigue of a FRAM.

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Data retention

FRAM is a nonvolatile memory device that can hold written data even after it is powered off. Its ability to hold data over long period is called data retention. Data retention is strongly dependent on temperature, so that it is generally provided that the guaranteed retention lifetime (e.g., 10 years) is subject to temperature conditions (e.g., 55°C or less).

The test method for data retention, various retention characteristics, and the mode of degradation that determines the lifetime of a FRAM are explained below.

(1) Test method

As explained above, data retention is strongly dependent on the temperature. Based on this characteristic, it is possible to calculate the long term lifetime of FRAM for a short time period by temperature acceleration. [See Figure 5 "Test flow".]

A data pattern (e.g., a checkerboard pattern of 0 and 1) is written into the FRAM, and it is left at a high temperature (e.g., 150°C) for a certain time period. Then the data pattern is read out from the FRAM under actual use (e.g., the lowest power supply voltage: 4.5 V, and the highest operational temperature: 85°C), and compared with the original written pattern. Then the reversed data pattern (where 0 and 1 are reversed) is written into the FRAM and the pattern is checked for correctness. Finally, the original data pattern is written into the FRAM again and it is stored at high temperature. This cycle is repeated until there is an error in either the first reading or the second reading. The retention lifetime of a FRAM stored at high temperature is determined.

Of the two readings in the cycle flow, the first reading is called SS (same state) because the original data pattern is read out as it is from a FRAM stored at high temperature and the second reading is called OS (opposite state) because the reversed data pattern is read out from that FRAM.

Figure 5. Test flow

(2) Temperature acceleration

Table 2 is the storage test result at 85-175°C. Failures occurred at the highest temperature 175°C/2 kh, but there occurred no failure on any other conditions. This means that the FRAM is more likely to fail at a higher temperature. We will continue to conduct this test on the FRAM to obtain the temperature acceleration coefficient to predict the data retention lifetime of a FRAM used in an actual application.

(3) Dependence on power supply voltage

The writing voltage applied to a ferroelectric capacitor in a memory cell is proportionate to the power supply voltage. On the other hand, the level of polarization of the ferroelectric film is dependent on the applied voltage as shown in Figure 6. The retention tends to be dependent on the level of polarization, so that writing with an insufficient power supply voltage may cause a reduction of retention. The test of data retention as mentioned above is made at the lowest voltage for the guaranteed operation on the catalog (e.g., 4.5 V). Accordingly data retention at a voltage less than that of lowest voltage is not guaranteed.

Figure 6. Graph of QTV characteristic

        a) Degradation by depolarization

Depolarization means a decrease in the level of polarization of ferroelectric film, which weakens the hysteresis characteristic as shown in Figure 7. Decrease in the level of polarization concerns errors in reading because the FRAM reads data by detecting the levels of polarization.

Depolarization of the FRAM is greater at a higher ambient temperature. When the FRAM is exposed to a temperature, its depolarization is determined in seconds, and stays almost unchanged after that time. Returning the FRAM to the original temperature and rewriting data in it restores the original level of polarization. Failure in retention caused by depolarization means a defect in the SS reading in the evaluation cycle flow as shown in Figure 5.

Figure 7. Degradation of the hysteresis characteristic by depolarization

        b) Degradation by imprint

Imprint means that the FRAM becomes resistive to reversal in polarization according to data that is written in. A FRAM recognizes 0 and 1 by detecting the levels of polarization, and therefore, it is difficult to read/write the reverse data in a FRAM if imprint occurs. Imprint is observed as a rightward or leftward shift of the hysteresis loop as shown in Figure 8.

The OS reading in the evaluation cycle flow in Figure 5 is done to check this mode of degradation.

Figure 8. Degradation of the hysteresis characteristic by imprint

(5) Others

The surface mounting device receives heat stress in mounting. Data retention is considered to be affected by certain temperatures in mounting. The FRAM must, therefore, be exposed under 260°C in mounting. For detailed mounting conditions, please contact our sales division.

FUJITSU FRAM Quality & Reliability

Reliability(2/4)

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== Fatigue ==

Fatigue means a decrease in the level of polarization caused by repeated reversals of polarization of the ferroelectric film (See Figure 9.). Fatigue caused by repeated reversals of polarization occurs not only in writing cycles but also in reading cycles, because there is a reversal in the polarization in a cycle process of operation from reading from a FRAM memory cell to rewriting in it because the reading is destructive to data. Accordingly the number of reversals in the polarization of a FRAM is specified as a number of times of possible access to the memory cells, whether they are in read or write cycles.

The test method for evaluation of fatigue, various fatigue characteristics, and the modes of degradation are explained below.

Figure 9. Mechanism of fatigue

(1) Test Method

The test method for fatigue is applying fatigue stress to a FRAM by repeating write or read cycles and then checking that it operates correctly. Assuming that the time of an operation cycle is 250 ns for a 64 k bit FRAM in an organization of 8 k words x 8 bits, the test time it takes to apply the fatigue stress to the FRAM is calculated as follows. Eight bits are simultaneously applied with stress at one time of access, so that it takes 8 k (8,192) cycles to apply fatigue to all the memory cells. For example, the times it takes to implement some test times are calculated as follows.

10EXP6 ; 250ns x 8,192  x 10EXP6 = 0.57 hour
10EXP8 ; 250ns x 8,192  x 10EXP8 = 57 hour (=2.37 days)
10EXP10 ; 250ns x 8,192  x 10EXP10 = 5700 hour (=237 days)
10EXP12 ; 250ns x 8,192  x 10EXP12 = 65 years

As shown above, performing the test of fatigue at some large numbers of cycles is unrealistic. The following methods are taken to substitute for such evaluation.

    a) Acceleration of fatigue by applying an excessive voltage
    b) Limiting the number of cells to be stressed (sampling test)
    c) Applying stress to many devices simultaneously (simultaneous measurement test)

For example, a.) voltage acceleration accelerates by approximately 10 times the fatigue in a FRAM by applying an increment of 1 V to FRAM. The method b.) is generally combined with the method c.) not to under-evaluate fluctuation in the characteristic among cells.

(2) Various characteristics

It has been confirmed that no failures occur in a 64 k bit FRAM after writing in 10EXP10 times under the following conditions. [See Table 3 Fatigue test data.]

• Power supply voltage: 6 V
• Temperature in applying stress: 85°C
• Temperature in an operation test after stress applied: 85°C
• Stress area: 4 k bit/device
• Stress pattern: writing 1 and 0 alternately
• Number of devices evaluated: 457

(3) Mode of degradation

The detailed mechanism of degradation by fatigue has not fully been elucidated. It is, however, known that fatigue causes some phenomena that are similar to those caused by depolarization as the mode of retention degradation. It is different from the depolarization in that the FRAM is not restored to the original level of polarization by rewriting.

FUJITSU FRAM Quality & Reliability

Reliability(3/4)

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== Data retention after fatigue ==

Data retention and fatigue are related to each other in the actual use of a FRAM. The retention characteristic of a memory cell given more fatigue is considered to be generally weaker than that of a memory cell given less fatigue. (Figure 11) To study that relationship, data retention is tested on devices using a various number of fatigue stress cycles. It has been confirmed that 2 x 10EXP7 fatigue stress cycles do not affect the retention characteristic. (See Table 4 Test data.)

Figure 11. Retention after fatigue stress (prediction)

FUJITSU FRAM Quality & Reliability

Reliability(4/4)

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Results of product reliability tests

Results of reliability tests on product units are shown in Tables 5 and 6.

Notes:

High Temperature Operating Life : No. of tests
Temperature Humidity Bias : No. of tests

• Pre-treatment : Baking (125°C, 24h) + (Moisture Absorption (85°C/85%RH, 12h) + IR Reflow 240°C MAX.) x 2 times  

High Temperature Operating Life
Temperature Humidity Bias
Low Temperature Operating Life

• Conditions for operation with alternative currents: power supply voltage of 6.0 V, input frequency of 1 MHz

Notes:

Temperature Cycling : No. of tests
Pressure Cooker Test : No. of tests

• Pre-treatment : Baking (125°C, 24h) + (Moisture Absorption (85°C/85%RH, 12h) + IR Reflow 240°C MAX.) x 2 times  

Pressure Cooker Test with Bias

• Pressure Cooker Test with Bias operating conditions: power supply voltage of 6.0 V