Overview | SOP/TSSOP | QFP/LQFP/HQFP | FBGA | PBGA | TEBGA | FC-BGA | WL-CSP |
Packages
Features
- Sealed with plastic resin to achieve high cost performance.
- Superior support for multi-pin.
- Package sizes at 27mmSQ, 31mmSQ, and 35mmSQ are available.
PBGA Package external view
PBGA Package cross section
Multi-pin BGA Package road map
Fujitsu Microelectronics will provide the most suitable SiP to the customer's requirements with our extensive implementation
technologies.
Please do not hesitate to contact us.
PBGA Package line-up
| Pin count | Package size (mm) | Pin arrangement | Pin pitch (mm) | |
|---|---|---|---|---|
| X | Y | |||
| 256 (IO256) | 27.0 | 27.0 | 4 rows | 1.27 |
| 320 (IO256+TB64) | 27.0 | 27.0 | 4 rows | 1.27 |
| 321 (IO321) | 19.0 | 19.0 | Full Matrix(With nonexistent pins) | 1.00 |
| 352 (IO352) | 35.0 | 35.0 | 4 rows | 1.27 |
| 353 (IO304+TB49) | 31.0 | 31.0 | 4 rows | 1.27 |
| 416 (IO352+TB64) | 27.0 | 27.0 | 4 rows | 1.00 |
| 416 (IO352+TB64) | 35.0 | 35.0 | 4 rows | 1.27 |
| 420 (IO420) | 35.0 | 35.0 | 5 rows | 1.27 |
| 480 (IO416+TB64) | 27.0 | 27.0 | 5 rows | 1.00 |
| 484 (IO420+TB64) | 27.0 | 27.0 | 5 rows | 1.00 |
| 484 (IO420+TB64) | 35.0 | 35.0 | 5 rows | 1.27 |
| 520 (IO420+TB100) | 35.0 | 35.0 | 5 rows | 1.27 |
| 543 (IO479+TB64) | 27.0 | 27.0 | 6 rows | 1.00 |
| 544 (IO480+TB64) | 27.0 | 27.0 | 6 rows | 1.00 |
| 564 (IO500+TB64) | 31.0 | 31.0 | 5 rows | 1.00 |
| 676 (IO676) | 27.0 | 27.0 | Full Matrix | 1.00 |
| 676 (IO576+TB100) | 35.0 | 35.0 | 5 rows | 1.00 |
| 772 (IO672+TB100) | 35.0 | 35.0 | 6 rows | 1.00 |
| 808 (IO708+TB100) | 35.0 | 35.0 | 5 + 2 rows | 1.00 |
| 868 (IO672+TB196) | 35.0 | 35.0 | 6 rows | 1.00 |
| 900 (IO756+TB144) | 35.0 | 35.0 | 7 rows | 1.00 |
| 1156 (IO1156) | 35.0 | 35.0 | Full Matrix | 1.00 |
*TB : Thermal Ball
Please contact us for information on other packages.
