FAQ for FR Family

Reset

---

1. Is the oscillation stabilization wait time required when a reset is caused by watchdog reset?
2. How is the watchdog timer at software reset? (Target: MB91101)
3. Why does the watchdog reset time have the maximum and minimum values?
4. It is described that the RST input ("L" period) is for at least five clocks(5CLK). Is there any problem in using the same condition while using PLL? (Target: MB91101)
5. Does a program run away when the NMI signal is undefined after canceling the power-on reset?
6. It is described that the power-on reset should be done. Otherwise, what problem can be considered?

---

Is the oscillation stabilization wait time required when a reset is caused by watchdog reset?

• Answer :
  A reset by watchdog does not stop the oscillation, so stabilization wait is not required.

---

How is the watchdog timer at software reset? Target: MB91101)

• Answer :
  The specified value of the watchdog timer is also reset at software reset. Therefore, it is necessary to specify WTCR again.

---

Why does the watchdog reset time have the maximum and minimum values?

• Answer :
  For clearing the factor of the watchdog reset, the system clears not the watchdog counter itself but the 1-bit counter that counts overflows of the counter. Therefore, the maximum and minimum values exist. For software, it is necessary to clear the watchdog at the minimum interval.

---

It is described that the RST input ("L" period) is for at least five clocks(5CLK). Is there any problem in using the same condition while using PLL? (Target: MB91101)

• Answer :
  It is the same for using PLL.

---

Does a program run away when the NMI signal is undefined after canceling the power-on reset?

• Answer :
  Because NMI has the interrupt level of 15 and is masked immediately after a reset until ILM (initial value is 15) is specified, it is never mistaken for another interrupt. However, the NMI pin left open may cause malfunction, so perform the pull-up processing.

---

It is described that the power-on reset should be done. Otherwise, what problem can be considered?

• Answer :
  Note when the power-on reset does not occur (assuming that the reset is asserted as long as the oscillation stabilization wait time): Some registers are not initialized.