FAQ for FR Family

Others

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1. How should we specify the weight of WTC2 to WTC0 of AMD4/5 when using DRAM Interface (I/F)? (Target: MB91101)
2. How is the reliability related to ESD of the microcomputer?
3. Does the current consumption at the same frequency vary depending on using either PLL or divided source oscillation for the peripheral gear setting and CPU gear setting?
4. Why are the countermeasures, 1) embedding capacitors into I/O and the power supply interconnects and 2) optimizing the oscillation circuits, to be taken for noise control effective for reducing the noise?
5. How can we use the coprocessor absence trap etc.?

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How should we specify the weight of WTC2 to WTC0 of AMD4/5 when using DRAM Interface (I/F)? (Target: MB91101)

• Answer :
  When DRAM I/F is used, the settings for DMCR become effective. So, the weight specification of ADM does not depend on the CPU operation.

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How is the reliability related to ESD of the microcomputer?

• Answer :
  It is managed under the following conditions: (1) Human Body Model (HBM, 100 pF, 1.5 kΩ): JEDEC class B of ±2000 V (2) Machine Model : JEDEC class 2 of ±300 V

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Does the current consumption at the same frequency vary depending on using either PLL or divided source oscillation for the peripheral gear setting and CPU gear setting?

• Answer :
  Since the consumption at PLL is minimal, it does not affect the entire current consumption. Basically, the current consumption is the same if the same internal clock is used.

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Why are the countermeasures, 1) embedding capacitors into I/O and the power supply interconnects and 2) optimizing the oscillation circuits, to be taken for noise control effective for reducing the noise?

• Answer :
  
  1. Embedding capacitors into I/O and the power supply interconnects can prevent the noise components from being propagated to outside.
  2. Optimizing the driving ability for oscillation reduces the higher harmonic components.

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How can we use the coprocessor absence trap etc.?

• Answer :
  MB91150 does not support coprocessors. (No product supports it so far.) Since no coprocessor is installed, basically the absence trap occurs when the coprocessor control instruction is executed.