The manual states that, when the analog input impedance is high, a capacitor of about 0.1µF is attached to the analog input
pin. What symptom can occur if the capacitor capacitance is not sufficiently larger than that of a capacitor in the sampling
hole circuit?
Answer : At A/D converter sampling, charges of the external capacitor are going into the sampling hold circuit. In this case, If the
external capacitor capacitance is smaller, much charges flow into the internal capacitor, causing the analog voltage to drop
in a moment. After that, the internal capacitor is charged to provide regular analog values. However, if the sampling time
is not sufficient, the precision of the conversion values may not be satisfied.
What is the internal impedance of the A/D converter?
Answer : The internal impedance of the A/D converter depends on devices. For details on the internal impedance, see the A/D converter
section in each device's data sheet. (Resistance: About 2 kΩ, capacitance: 30 pF)
How was the recommended value of driving impedance to analog input in the hardware manual or data sheet calculated? (In MB90545G,
15.5 kΩor lower is recommended.)
Answer : When a 15.5 kΩ external circuit exists at the A/D port (3.2 kΩ, 30 pF: Internal circuit constant)
t = CR = (3.2 kΩ + 15.5 kΩ) x 30 pF = 561ns
The time constant is a time at 63.2% charging voltage, so the time that is 8 to 10 times the charging time is actually required. 561ns x 8 ≈ 4 us → Actual charging time In microcomputer sampling time setting, the fastest 4 us sampling time (64 cycles: at 16 MHz) can be satisfied.
When do I have to determine the A/D input voltage after A/D conversion is started?
Answer : Determine the A/D input voltage during the sampling time (before A/D conversion). You can obtain a measure of the time at which the A/D input voltage becomes stable on the system by calculating a time constant
from the C,R (reference constant) between the external impedance and internal circuit.
How much capacitance of the capacitor can be connected to the analog input pin?
Answer : The capacitance of the capacitor that can be connected to the analog input pin is not a problem when it is sufficiently greater
than the capacitance in the analog circuit. We believe that the capacitance is not a problem as long as it is greater than
or equal to 0.1 µF.
Answer : Leaving unused input pins open may cause a malfunction or latch-up. For this reason, we recommend to perform pull-up or pull-down
treatment with a resistor of 2 kΩ or higher.
Can I connect the Avcc power supply pin of the A/D converter to Vss during standby?
Answer : This power supply pin should be used on the condition that Vcc is equal to Avcc. The reason is that if voltage is applied to the digital port, the voltage may be applied to Avcc from the port because the
analog input pin also serves as a digital port.
What is the power consumption of the Avcc and AVRef pins in Time-Base-Timer mode?
Answer : In Time-Base-Timer, the current from the Avcc pin and that from AVRef pin are the IAH current and IRH current respectively
in the data sheet, so power consumption is MAX 5 µA. When the A/D converter is halted, the current value from the Avcc pin and from AVRef pin are the Avcc current and AVR current
respectively, so we believe that power consumption is about tens of nA at room temperature.
When the A/D converter is not used and pin processing of "Avcc = 0 V" is performed, the P70 for input port setting does
not rise to the Vcc potential. Is the cause of this problem "Avcc = 0 V"? (Target: MB90340, MB90860)
Answer : We think that the cause of this problem is "Avcc = 0 V." We judge that this symptom occurs as a result of the current flow from P70 to Avcc because P70 is a pin also used for AN16.
Can the A/D accuracy vary with Vcc even though the AVRH is constant?
Answer : When Vcc=Avcc>=AVRH and Avss=Vss=0, A/D accuracy never varies with Vcc within the A/D accuracy assurance range. We hope you
will confirm whether AVRH may decrease due to current branching during A/D conversion.
What problem may arise when the voltage of the reference H pin of the A/D converter is less than the power supply voltage
of the microcomputer?
Answer : When the voltage of the reference H pin of the A/D converter is less than the power supply voltage of the microcomputer, it
can exceed various tolerances in electrical characteristics because A/D conversion is performed between the reference H pin
and reference L pin.
"As |AVR-AVSS| becomes smaller, the error relatively becomes larger" is written in the data sheet. What
is the cause?
Answer : When |AVR-AVSS| becomes small, the voltage per LSB also decreases. When the voltage per LSB decreases, the relative
error increases because it tends to be easily affected by noise.
Is it better to insert a pull-up resistor when I input a Vcc voltage to the reference pin (AVRH)?
Answer : Current flows to the reference pin (AVR) when A/D conversion is performed, so if you insert a pull-up resistor, the AVR supply
voltage decreases. For this reason, we recommend usinge the pull-up resistor directly connected to Vcc.
Does simultaneous input of Vcc and AVRH cause any problem? (Vcc is connected to AVcc and AVRH.)
Answer : Completely simultaneous input of Vcc and AVRH does not cause any problems. It seems that there is no problem if Vcc and AVRH are supplied from the same interconnect.
When the A/D converter is not activated, is the dark current reduced when the AVRH pin is unconnected externally?
Answer : The dark current is not reduced. This is because, when the A/D converter is not activated, the AVRH pin is disconnected with
the internal switch. To be exact, the IRH value logically remains unchanged.
If one of eight A/D ports is in any of the following states, can I monitor the input voltages of other ports? (1) Input voltage
ANn<AVRL (2) Input voltage ANn>AVRH (n is a value from 0 to 7)
Answer : As explained in the electrical characteristics of this MCU, the input voltage to analog ports should be between AVRL and AVRH. When (1) input voltage ANn is less than AVRL or when (2) input voltage ANn is greater than AVRH, it is thought that A/D conversion
of other analog ports can be performed without any problem because there is no internal path that affects the conversion.
If AN0 to AN7 are searched by using the middle port of eight A/D ports as a general-purpose port, how is analog conversion
of the middle port used as a general-purpose port?
Answer : Basically, the port state is converted from analog to digital.
Can I efficiently convert multiple channels from analog to digital?
Answer : The A/D converter macro provides a function that continuously converts the set channels from analog to digital. By using this
macro with the extended intelligent I/O function, you can also efficiently convert multiple channels from analog to digital.
The A/D converter is not started although software is started (STRT bit=1).
Answer : Is the BUSY bit set to 0? If the BUSY bit is set to 0 when the STRT bit is 1, the A/D converter is forcibly terminated. We
recommend setting the STRT bit to "1" with the SET bit instruction because "1" is always read from the BUSY bit when
an RMW instruction is executed.
The manual says that "If the A/D converter is restarted according to the STRT bit in the A/D converter restart able one-shot
mode (MD0,1=00), the set channels (CH0→1,2,3,4...) may be converted in the order of CH0→CH1-RESET-00→CH0→CH1.... Originally,
they should be converted in the order of CH0→CH1-RESET-CH0→CH1." What is the cause?
Answer : If interrupt routine processing is long when the A/D converter is restarted according to the STRT bit in the A/D converter
restart able one-shot mode (MD0,1=00), this symptom can occur because the system tries to control the next interrupt. To avoid
this, we recommend that, when restarting the A/D converter during A/D conversion, you clear the INT bit and then restart the
A/D converter (also clear the INT bit here).
Can I define and set the start channel setting bits (ANS0 bit to ANS2 bit) and end channel setting bits (ANE0 bit to ANE2
bit)?
Answer : In the start channel setting bits (ANS0 bit to ANS2 bit), the place to be accessed at read differs from the place to be accessed
at write as follows:
At read: Channel number being converted from analog to digital At read: Converted channel number if A/D conversion is halted
At write: Start channel setting
Therefore, if the end channel setting bits (ANE0 bit to ANE2 bit) are defined and set, the start channel setting bits (ANS0
bit to ANS2 bit) can change to unintended channel setting. For this reason, avoid start channel setting in bit definition.
The high-order A/D data register (ADCR:H) can be used to select A/D conversion compare time and sampling time. What is the
design concept of these selections? For example, is conversion accuracy higher if compare time is longer?
Answer : The time to charge the sample hold circuit to be built into the A/DC at external analog voltage is called sampling time. The
time to convert the charged voltage to a digital value is called compare time. We think that sampling time influences conversion
accuracy of the A/D converter more than compare time does. We think this because the A/D sample hold circuit retains analog
voltage per conversion, so if you try to charge the analog voltage to be newly converted, the previously sampled analog voltage
is temporarily output to an external pin. At this time, if the impedance of the analog pin is high, sampling time terminates
before it returns to the original analog voltage value and the voltage charged to the sample hold circuit is converted to
a digital value because it is assumed to be abnormal.
I cannot understand why conversion time can be selected.
Answer : Conversion time cannot be selected because the minimum conversion time should be able to be set even if the machine cycle
is 8 MHz. If a customer changes the machine cycle according to his or her convenience, the A/D conversion time is delayed
accordingly. For this reason, the A/D conversion time is designed so that the shortest possible A/D conversion time can be
set.
Is there a relationship between the internal operation frequency and the conversion precision of AD? (Comparison with 8 MHz,
16 MHz, and 24 MHz)
Answer : The internal operation frequency is not directly related to the conversion precision of AD. Influences may be generated by
the sampling time and output impedance that vary depending on the internal operation frequency.
What is the difference between analog input leakage current and input leakage current?
Answer : Analog input leakage current is a current value that leaks when a port voltage is sampled in A/D conversion. Input leakage current is a current that leaks through an internal protection diode when the port is in the input status (Hi-z).
This analog input leakage current is actually about 100 nA or low.
