I/O interfaces incorporated in the processor
With T5240/T5140/T5220/T5120 servers, components such as memory controllers, PCI-Express interface controllers are integrated onto the CPU chip. With T5220/T5120 servers, 10Gbps Ethernet interface controllers (*1) are integrated onto the CPU chip. With such mechanisms and small number of parts in a server, reliability of these servers is improved.
With such technologies, plus I/O controllers imbedded in processor, the number of parts is shrunk, resulting server reliability improvement.
(*1) Only UltraSPARC T2 processor incorporates 10Gbps Ethernet controller.

Memory controller
UltraSPARC T2 and T2 Plus processors incorporate memory controllers.; With direct access to memories from CPU chip, plus swift data transmission using FB-DIMM, memory access performance is improved. Plus memory access bandwidth per CPU-memory link is improved 20% from UltraSPARC T2 to T2 Plus, increasing to 4.8 Gbps over the 4.0 Gbps of the UltraSPARC T2 processor.
PCI Express Interface
With PCI Express interfaces incorporated in UltraSPARC T2 and T2 Plus processors, I/O performance is much improved.
10Gbps Ethernet Interface (*1)
The newest architecture 10Gbps Ethernet interface (XAUI) (*2) is incorporated in UltraSPARC T2. Due to direct access from processor to network interface, network performance is improved. Sufficient network bandwidth is assured in Solaris Container.
(*1) Only UltraSPARCT2 processor incorporates 10Gbit Ethernet interface. (*2) XAUI (10 Gigabit Attachment Unit Interface) is 10 Gigabit interface standard.
