Archived content
NOTE: this is an archived page and the content is likely to be out of date.
System on Chip - Processor I/O interface
Fujitsu SPARC64™ X processor helps reduce time to access I/O and memory because main system units – inter-CPU interfaces, memory controllers, PCI Express 3.0 interfaces are incorporated in CPU. Plus, server quality improves due to reduction of number of components.
High speed interconnect
Fujitsu M10-4S has two types of interconnects : one for CPUs in a Building Block and the other for CPUs between different Building Blocks, which help upscale servers to 64 CPU and 1024 cores. Fujitsu M10-4 has interconnects for CPUs in one Building Block. These high speed for Interconnects helps scale your applications performance lineally. The throughput for these interconnects are as follows.
- 29.12 GB/s for each interconnect between CPU in the same Building Block
- 232.96 GB/s for all of interconnects between two Building Blocks.
Memory Controller
All of Fujitsu M10 models help reduces memory access time due to direct access between CPU and memory. The last models for SPARC servers, SPARC Enterprise M series have memory controllers, which are incorporated in SPARC64 X CPU. SPARC64 X CPU with four memory controllers and eight memory buses inside connects 16 memory slots.
PCI Express unit
SPARC64 X has two PCI Express units inside with version 3.0 interface and 8lanes.
