Note | PLL architecture | Added Features | Loop filter calculation | Recommended texts | RF layout |
PLL Application Note
After discussing the architecture of Fujitsu PLLs and special features of particular series, this application note describes the calculation of a loop filter, then gives practical advice on RF layout for good results, including design of an evaluation system to aid development of reliable frequency synthesiser loops.
A list of recommended texts is included.
The next article details application benchmark designs for the GSM, DECT and DCS1800 standards concluding with typical results for these systems.
