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  6. MB8AA3020 Introduction & Highlights

 Introduction & Highlights |  Key Feature list |  Evaluation Board |


Networking ASSP

AXEL-X (MB8AA3020): 20 port 10G Ethernet switch with 10G SerDes and management processor integrated on chip

Product information

The new switch complements Fujitsu’s family of 12-port, 10GbE devices, which are distributed via FME as a part of the Networking Telecom portfolio. The overall structure of the level 2+ Ethernet switch is sketched in Figure 1 below.

AXEL-X top-level block diagram On-chip CPU and Ethernet-based API AXEL-X ports AXEL-X ports Multi-port-streaming memory

Figure 1: AXEL-X chip structure

AXEL-X is the first device on the market, incorporating...

  • the CPU for managed network applications via e.g. one 1G Ethernet port,
  • eXAUI, CX4, direct 10G serial XFP-fiber modules support,
  • TX pre-emphasis and RX equalization/serialization on chip,
  • internal buffer memory size of about 3Mbyte.

AXEL-X is a highly suitable solution for low cost ATCA, high end router/switch architectures and also as a replacement device for proprietary network/communication systems because of lower cost achieved by using a standard technology.

On-chip CPU and Ethernet-based API

For large networks, the trend away from packet based flow control mechanism like priority pause towards a managed data stream approach is one on the most important trends. With the increasing size of the network, the data stream view becomes much more important than dealing with single packets. Regular and redundant network designs enable the use of flow control algorithms to manage the flow of data in the network. AXEL-X reflects this fact by integrating the local managing processor into the chip reducing system production cost by a factor of 2-3 compared to external processor, e.g. PowerPC usage. An immediate consequence is the small form factor, the reduction of power consumption and also to mention is the cost of ownership.

AXEL-X 10Gb/s ports

Because of system cost efficiency, all the 20 AXEL-X ports are capable to drive XAUI, CX4 (eXAUI) and also 10G SerDes (XFP) modules, since these are expected to be the most cost effective solution on the market for fiber attachment. This increases product lifetime, upgradeability, simple and cost effective multi chip implementations and (by far) the best XFP fiber based packet latency found on the market. Moreover, featuring 10G the 10GSerDes technology enables simplest integration of the AXEL-X chip into many networking telecommunication scenarios.

Classical LAN protocols like TCP/IP and Pause frame are not working for large distances and network designs, but the physical distances for Ethernet based networks are increasing. AXEL-X adds additional level 2 features like outbound routing and Backward Congestion Notification (BCN) to simplify network performance and throughput.

Multi-port streaming memory

To minimize the risk of packet loss caused by Ethernet flow congestion and stalls, the internal buffer size is essential. Also, the reaction time for flow control optimization increases. With 2.9Mbyte of internal memory, Axel-X is the leading device on the market, enabling cost effective network designs for application areas like metropolitan area networking, AdvancedTCA, high performance computing, data access servers and more. Together with the full features QoS, Congestion management, the internal buffer is large enough to enable external CPE/provider to react to congestions.