Macro Embedded Cell Array: CE81 series
Special I/O Macros
| Type | Comments |
|---|---|
| TLVTTL | Terminated LVTTL (3.3V, 2.5V) |
| PCML | Pseudo Current Mode Logic (Central level: Vc=2.0V, 1.6V, 1.3V) |
| LVDS | Low Voltage Differential Signals |
| SSTL2 | Stub Series Terminated Logic ( 2.5V ) |
| PCI Buffer | 3.3V 66MHz |
| USB Buffer | Driver/Receiver for Full/Full & Low Speeds |
| AGP 2x | Accelerated Graphics Port 2x mode |
Analog Macros
| Type | Comments |
|---|---|
| AD converter | 8 bit/50MS/s (@3.3V) |
| 10 bit/30MS/s (@3.3V) | |
| DA converter | 8 bit/50MS/s (@3.3V) |
| 10 bit/30MS/s (@3.3V) | |
| 10 bit/1.5MS/s (@3.3V) | |
| 8 bit/200KS/s (@3.3V) |
In addition, various op-amps, analog switches and comparators can be provided on a case by case basis. Please contact your Fujitsu dealer for details.
Analog PLL (with built-in LPF)
| Maximum output frequency | Input frequency | Output frequency | Gain | Comments |
|---|---|---|---|---|
| 50MHz | 25MHz | 50MHz | 2 | @1.8V |
| 100MHz | 25MHz | 100MHz | 4 | @1.8V |
| 150MHz | 30MHz | 150MHz | 5 | @1.8V |
| 200MHz | 50MHz | 200MHz | 4 | @1.8V |
| 250MHz | 50MHz | 250MHz | 5 | @1.8V |
| 300MHz | 50MHz | 250MHz | 6 | @1.8V |
Note: As long as the combination of input frequency and output frequency are less than the prescribed maximum frequency, other combinations (gains) than those indicated above are possible. Please contact your Fujitsu representative for further information on this subject.
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