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Signal Integrity

SI simulation for DDR SDRAM

We design board which satisfied Signal Integrity(SI) about DDR SDRAM Interface.

Simulator: SignalAdvsier-SI(Fujitsu)
        Hspice(SYNOPSYS)

DDR SDRAM
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DDR timing

SI simulation for High speed digital channel

We design board which satisfied Signal Integrity(SI) about High speed digital channel

Simulator: SignalAdvsier-SI(Fujitsu)
        Hspice(SYNOPSYS)

Backplane
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Channel Model
Eye Diagram

SI simulation by using 3D electromagnetic field simulator

We design high-speed digital board using electromagnetic field simulation.

Simulator: MW-Studio(CST)

3D Model

Insertion

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