Foundry Service Press Releases
Advanced Packaging
- March 31, 2008 Sunnyvale, CA
- Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group
- July 15, 2002 San Jose, CA
- Fujitsu Introduces Industry's Smallest Chip-Size Module with Advanced System-in-Package Technology
San Jose, CA, July 15, 2002 – SiP Technology Enables MCPs as Small as their Largest Individual Device
- May 20, 2002 Santa Clara, CA
- ISSI Introduces New Stacked Multi-Chip Modules for Mobile Communications Market
Santa Clara, CA, May 20, 2002 – Integrated Silicon Solution, Inc. (Nasdaq: ISSI), a leader in advanced memory solutions, today introduced a new family of stacked multi-chip package (MCP) Flash and SRAM memory products. The new products combine ISSI's 8Mb low-power asynchronous SRAM with Fujitsu's 64Mb or 32Mb NOR-type Flash memory in a stacked multi-chip module with fine-pitch ball grid array (FBGA).
- March 25, 2002 San Jose, CA
- Fujitsu Introduces Industry's First Eight-Stacked Multi-Chip Package for Mobile
San Jose, CA, March 25, 2002 – IC Cards, Compact Hard Drives Now Support Three-stacked Chips in One Package
- February 20, 2002 San Jose, CA
- Fujitsu Introduces High-Capacity Four-Stacked MCP and Two-Stacked MCP
San Jose, CA, February 20, 2002 – Two New MCPs Provide Industry's Largest Memory Capacity for Mobile Devices
Wafer Fab Service
- March 31, 2008 Sunnyvale, CA
- Fujitsu Introduces 65-Nanometer 10G SerDes from Prism Circuits
Sunnyvale, CA, March 31, 2008 – High-Speed Applications Among Key Focus of the U.S.-Based Fujitsu Semiconductor Manufacturing Services Business Group
- May 24, 2007 Tokyo, Japan, Sunnyvale and Newport Beach, CA
- Jazz and Fujitsu to Collaborate on Providing Complete Solution for 90nm and 65nm RF CMOS Foundry Customers
Tokyo, Japan, Sunnyvale and Newport Beach, CA, May 24, 2007 – IP Providers Transmeta and Tensilica to Join Fujitsu in Booth 833
- January 26, 2007 Sunnyvale, CA
- Fujitsu to Feature Advanced 65-Nanometer Process Technology, 10Gbps Ethernet Switch Chip at DesignCon 2007
Sunnyvale, CA, January 26, 2007 – IP Providers Transmeta and Tensilica to Join Fujitsu in Booth 833
- October 10, 2006 San Jose, CA
- Fujitsu to Feature World-class 65-Nanometer Process Technology for Advanced Networking, Mobile Applications at 12th Annual
FSA Conference
San Jose, CA, October 10, 2006 – CS200HP / 200A, Part of Fujitsu’s Turnkey Services for Customers, at Booth #410
- September 15, 2006 Tokyo, Japan
- Fujitsu and Advantest to Establish Joint Venture to Create Semiconductor Prototypes Using Electron Beam Direct Lithography
Tokyo, Japan, September 15, 2006 – Fujitsu Limited and Advantest Corporation today announced plans to establish a joint venture to create prototype semiconductors by using electron beam direct lithography.
- June 13, 2006 Tokyo, Japan
- Fujitsu, NEC Electronics, Renesas, and Toshiba to Aim for Standardization of Semiconductor Process Technology for Next-Generation
LSI
Tokyo, Japan, June 13, 2006 – Fujitsu Limited ("Fujitsu"), NEC Electronics Corporation ("NEC Electronics"), Renesas Technology Corp. ("Renesas Technology"), and Toshiba Corporation ("Toshiba") today announced that they have agreed to seek to define a standard process technology that can be applied to the manufacture of advanced system LSIs at the 45-nanometer (nm)* generation and beyond.
- June 13, 2006 Tokyo, Japan
- Fujitsu and Lattice Strengthen Partnership
Tokyo, Japan, June 13, 2006 – Fujitsu Limited and Lattice Semiconductor Corporation today announced that they have signed a distribution agreement in which Fujitsu Devices Inc. will be added as an authorized distributor of Lattice's FPGA/PLD products in Japan.
- June 13, 2006 Sunnyvale, CA
- Fujitsu to Feature Success at 65-Nanometer Process Technology at Fabless Semiconductor Association Forum June 14
Sunnyvale, CA, June 13, 2006 – “Fujitsu at 65nm” Presentation to Focus on Challenges of Deep Submicron Process
- February 6, 2006 Sunnyvale, CA
- Fujitsu to Highlight New 65-Nanometer Process Technologies, 10 Gigabit Ethernet and the WiMAX SoC at Annual DesignCon 2006,
Booth 641
Sunnyvale, CA, February 6, 2006 – “65nm CMOS Process Technology” TecPreview Session Set for Feb. 7 at 10:15 a.m.
- January 11, 2006 Tokyo, Japan
- Fujitsu to Construct New Fab for Logic Chips Employing 65nm Process Technology and 300mm Wafers
Tokyo, Japan, January 11, 2006 – Fujitsu Limited today announced that it will construct a new fab to mass-produce logic semiconductors employing leading-edge 65-nanometer (nm) process technology and 300 millimeter (mm) wafers.
- November 2, 2005 Fremont, CA and Tokyo, Japan
- Fujitsu to Manufacture Leading-edge 3D Graphics Processors for S3 Graphics
Fremont, CA and Tokyo, Japan, November 2, 2005 – Fujitsu's 90 nanometer technology enables high performance graphics chips featuring high speeds and low power consumption
- October 3, 2005 Sunnyvale, CA
- Fujitsu to Feature Industry-Leading Process Technology, Packaging Services in Booth 535 at Annual Fabless Semiconductor Association
Conference
Sunnyvale, CA, October 3, 2005 – Senior VP Keith Horn to Present "Beyond the IDM Business Model" October 5
- September 20, 2005 Sunnyvale, CA
- Fujitsu Introduces World-class 65-Nanometer Process Technology for Advanced Server, Mobile Applications
Sunnyvale, CA, September 20, 2005 – CS200/CS200A Offers Top Performance, Low Power with 25 Percent Gate Size Reduction
- April 18, 2005 Sunnyvale, CA
- IDM Business Model, Advanced Design and Technology Processes Detailed in New White Paper from Fujitsu
Sunnyvale, CA, April 18, 2005 – Describes Complete Capability Portfolio for 300mm, 90nm Custom Silicon
