MB89480 Series
LCD (31*4), A/D conv.
DESCRIPTION
The MB89480 series has been developed as a general-purpose version of the F²MC*-8L family consisting of proprietary 8-bit,
single-chip microcontrollers. In addition to a compact instruction set, the microcontroller contains a variety of peripheral
functions such as 21-bit time-base timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, 6-bit PPG, LCD controller/driver,
external interrupt 1 (edge), external interrupt 2 (level), 10-bit A/D converter, UART/SIO, buzzer, watchdog timer reset.
The MB89480 series is designed suitable for LCD remote controller as well as in a wide range of applications for consumer
product. Note: *: F²MC stands for FUJITSU Flexible Microcontroller.
FEATURES
- Package used

- QFP package and SH-DIP package for MB89P485/P485L, MB89485/485L
- MQFP package for MB89PV480
- High-speed operating capability at low voltage
- Minimum execution time: 0.32 µs/12.5MHz
- F²MC-8L family CPU core

- Instruction set optimized for controllers:
- Multiplication and division instructions
- 16-bit arithmetic operations
- Test and branch instructions
- Bit manipulation instructions, etc.
- Six timers

- PWC timer (also usable as a interval timer)
- PWM timer
- 8/16-bit timer/counter x 2
- 21-bit timebase timer
- watch prescaler
- Programmable pulse generator

- With full-duplex double buffer
- An asynchronous clock or a synchronous serial transfer can be used.
- UART/serial interface

- 6-bit PPG with program-selectable pulse width and period
- External interrupts

- Edge detection (Selectable edge) : 4 channels
- Low-level interrupt (Wake-up function) : 8 channels
- A/D converter (4 channels)

- 10-bit successive approximation type
- UART/SIO

- Synchronous/asynchronous data transfer capable
- LCD controller/driver

- max. 31 segments output x 4 commons
- booster for LCD driving (selected by mask option)
- Buzzer

- 7 frequency types are selectable by software
- General-purpose I/O ports (CMOS): 49
- Low-power consumption modes

- Stop mode (Oscillation stops to minimize the current consumption.)
- Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
- Watch mode (Everything except the watch prescaler stops to reduce the power consumption to an extremely low level.)
- Subclock mode
- Watch dog timer reset
- I/O ports: max. 42 channels
DOCUMENTATION
Note: The use of Adobe® Acrobat Reader is recommended to have all download and browsing features available for pdf files.
PDF Datasheet V1-00 (55 pages, 772 KB)
PDF Hardware Manual V2-00 (424 pages, 3.13 MB)
PDF P-SH package 1.778mm DIP (1 page, 64 KB)
PDF PF package 1mm QFP (1 page, 80 KB)
PDF PFM package 0.65mm QFP (1 page, 49 KB)
PDF CF package 1mm MQFP (1 page, 47 KB)
Parts Table
| Device Part Number | MB89485 | MB89P485 | MB89485L | MB89P485L |
| ROM (kB) |
16 | 16 | 16 | 16 |
| ROM (Type) |
Mask | OTP | Mask | OTP |
| RAM (Bytes) |
512 | 512 | 512 | 512 |
| MaxIntClockFrequ(MHz) |
3.13 | 3.13 | 3.13 | 3.13 |
| 32KHz Sub Clock |
yes | yes | yes | yes |
| Min I/O |
1 | 1 | 1 | 1 |
| Max I/O |
42 | 42 | 42 | 42 |
| External Interrupts |
12 | 12 | 12 | 12 |
| ADC |
4 | 4 | 4 | 4 |
| Timer / Counter 8 bit |
2 | 2 | 2 | 2 |
| Timer / Counter 16 bit |
1 | 1 | 1 | 1 |
| Ser I/O 8 bit |
1 | 1 | 1 | 1 |
| I2C |
NA | NA | NA | NA |
| Buzzer |
yes | yes | yes | yes |
| LCD segment lines |
31 | 31 | 31 | 31 |
| Rem Ctrl Carr Freq Gen |
NA | NA | NA | NA |
| External Bus Interface |
no | no | no | no |
| Chip Selects |
NA | NA | NA | NA |
| Vcc Min |
3.5 | 3.5 | 2.2 | 2.7 |
| Vcc Max |
5.5 | 5.5 | 3.6 | 3.6 |
| Power Saving Modes |
yes | yes | yes | yes |
| Pin Count |
64 | 64 | 64 | 64 |
