DESCRIPTION

The MB90370 series is a line of general-purpose, 16-bit microcontrollers designed for those applications which require high-speed real-time processing. The instruction set is designed to be optimized for controller applications which inheriting the AT architecture of F²MC-16LX series and allow a wide range of control tasks to be processed efficiently at high speed. A built-in LPC interface, serial IRQ and PS/2 interface simplifies communication with host CPU and PS/2 devices in computer system. Moreover, SMbus compliant I2C, comparator for battery control and A/D converter implements the smart battery control. With these features, the MB90370 series matches itself as keyboard controller with smart battery control. While inheriting the AT architecture of the F²MC*1 family, the instruction set for the F²MC-16LX CPU core of the MB90370 series incorporates additional instructions for high-level languages, supports extended addressing modes, and contains enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation instructions. In addition, the MB90370 has an on-chip 32-bit accumulator which enables processing of long-word data.
Notes:
*1: F²MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
*2: Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

FEATURES

• Clock
  
  • Embedded PLL clock multiplication circuit
  • Operating clock (PLL clock) can selected from divided-by-2 of oscillation or one to four times the oscillation (at oscillation of 4 MHz to 16 MHz)
  • Minimum instruction execution time of 62.5 ns (at oscillation of 4 MHz, four times the PLL clock, operation at VCC of 3.3 V)
• CPU addressing space of 16 Mbytes
  
  • Internal 24-bit addressing
• Instruction set optimized for controller applications
  
  • Rich data types (bit, byte, word, long word)
  • Rich addressing mode (23 types)
  • High code efficiency
  • Enhanced precision calculation realized by the 32-bit accumulator
• Instruction set designed for high level language (C) and multi-task operations
  
  • Adoption of system stack pointer
  • Enhanced pointer indirect instructions
  • Barrel shift instructions
• Program patch function (2 address pointer)
  
  • Improved execution speed
  • 4-byte instruction queue
• Powerful interrupt function
  
  • Priority level programmable : 8 levels
  • 32 factors of stronger interrupt function
• Automatic data transmission function independent of CPU operation
  
  • Extended intelligent I/O service function (EI2OS)
  • Maximum 16 channels
• Low-power consumption (standby) mode
  
  • Sleep mode (mode in which CPU operating clock is stopped)
  • Timebase timer mode (mode in which operations other than timebase timer and watch timer are stopped)
  • Stop mode (mode in which all oscillations are stopped)
  • CPU intermittent operation mode
  • Watch mode
• Package: LQFP-144 (FPT-144P-M12 : 0.4 mm pitch)
• Process: (CMOS technology)

DOCUMENTATION

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PDF Datasheet V1-00 (140 pages, 1364 KB)

PDF Datasheet V1-00 (65 pages, 817 KB)

PDF Hardware Manual V1-02 (1010 pages, 10086 KB)

PDF MB90378 Series Hardware Manual Rev1.0 (10.3 MB)